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Message-ID: <CAEUhbmUN4rkJA+KZQN1n=VFhC5=QX-DsfjEun6_HGR6WL3WgpQ@mail.gmail.com>
Date: Sun, 5 Apr 2020 22:37:03 +0800
From: Bin Meng <bmeng.cn@...il.com>
To: Atish Patra <atish.patra@....com>
Cc: linux-kernel <linux-kernel@...r.kernel.org>,
Anup Patel <anup@...infault.org>,
Albert Ou <aou@...s.berkeley.edu>, Gary Guo <gary@...yguo.net>,
Greentime Hu <greentime.hu@...ive.com>,
linux-riscv <linux-riscv@...ts.infradead.org>,
Mao Han <han_mao@...ky.com>,
Mike Rapoport <rppt@...ux.ibm.com>,
Nick Hu <nickhu@...estech.com>,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Thomas Gleixner <tglx@...utronix.de>,
Vincent Chen <vincent.chen@...ive.com>,
Zong Li <zong.li@...ive.com>
Subject: Re: [PATCH v11 04/11] RISC-V: Introduce a new config for SBI v0.1
On Wed, Mar 18, 2020 at 9:11 AM Atish Patra <atish.patra@....com> wrote:
>
> We now have SBI v0.2 which is more scalable and extendable to handle
> future needs for RISC-V supervisor interfaces.
>
> Introduce a new config and move all SBI v0.1 code under that config.
> This allows to implement the new replacement SBI extensions cleanly
> and remove v0.1 extensions easily in future. Currently, the config
> is enabled by default. Once all M-mode software, with v0.1, is no
> longer in use, this config option and all relevant code can be easily
> removed.
>
> Signed-off-by: Atish Patra <atish.patra@....com>
> Reviewed-by: Anup Patel <anup@...infault.org>
> ---
> arch/riscv/Kconfig | 7 ++
> arch/riscv/include/asm/sbi.h | 2 +
> arch/riscv/kernel/sbi.c | 132 +++++++++++++++++++++++++++++------
> 3 files changed, 118 insertions(+), 23 deletions(-)
>
Reviewed-by: Bin Meng <bmeng.cn@...il.com>
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