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Message-ID: <9004e519-61c0-83fd-dc24-07f84c384f8a@nvidia.com>
Date: Wed, 8 Apr 2020 00:26:22 +0530
From: sumitg <sumitg@...dia.com>
To: Dmitry Osipenko <digetx@...il.com>, <rjw@...ysocki.net>,
<viresh.kumar@...aro.org>, <catalin.marinas@....com>,
<will@...nel.org>, <thierry.reding@...il.com>,
<jonathanh@...dia.com>, <talho@...dia.com>,
<linux-pm@...r.kernel.org>, <linux-tegra@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
CC: <bbasu@...dia.com>, <mperttunen@...dia.com>, <sumitg@...dia.com>
Subject: Re: [TEGRA194_CPUFREQ Patch v2 2/3] cpufreq: Add Tegra194 cpufreq
driver
On 05/04/20 7:41 PM, Dmitry Osipenko wrote:
> External email: Use caution opening links or attachments
>
>
> 04.04.2020 22:29, Sumit Gupta пишет:
> ...
>> +static void tegra_read_counters(struct work_struct *work)
>> +{
>> + struct read_counters_work *read_counters_work;
>> + struct tegra_cpu_ctr *c;
>> + u64 val;
>> +
>> + /*
>> + * ref_clk_counter(32 bit counter) runs on constant clk,
>> + * pll_p(408MHz).
>
> Is changing PLLP rate really impossible on T194? What makes you say that
> it runs on a fixed 408MHz?
>
Pasting below from TRM.
Register "NVFREQ_FEEDBACK_EL1":
....
[31:0] PLLP counter: This counter counts at a fixed frequency (408 MHz).
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