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Message-Id: <1586298267-4722-1-git-send-email-wcheng@codeaurora.org>
Date: Tue, 7 Apr 2020 15:24:25 -0700
From: Wesley Cheng <wcheng@...eaurora.org>
To: agross@...nel.org, bjorn.andersson@...aro.org,
mturquette@...libre.com, sboyd@...nel.org, robh+dt@...nel.org,
mark.rutland@....com
Cc: linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
vinod.koul@...aro.org, Wesley Cheng <wcheng@...eaurora.org>
Subject: [PATCH v3 0/2] Enable SS/HS USB support on SM8150
Add required device tree nodes to enable the USB SS and HS
paths on the primary USB controller on SM8150. In addition,
implement missing resources from the SM8150 GCC driver, which
includes the USB GDSC and the USB PIPE clocks.
Changes in v3:
- Set dr_mode to "peripheral" on the SM8150 MTP DTSI file.
Changes in v2:
- Combine GDSC and USB PIPE clock changes.
- Re-order DTS nodes based on address
Jack Pham (1):
arm64: dts: qcom: sm8150: Add USB and PHY device nodes
Wesley Cheng (1):
clk: qcom: gcc: Add USB3 PIPE clock and GDSC for SM8150
arch/arm64/boot/dts/qcom/sm8150-mtp.dts | 21 +++++++
arch/arm64/boot/dts/qcom/sm8150.dtsi | 92 +++++++++++++++++++++++++++++
drivers/clk/qcom/gcc-sm8150.c | 52 ++++++++++++++++
include/dt-bindings/clock/qcom,gcc-sm8150.h | 4 ++
4 files changed, 169 insertions(+)
--
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