linux-kernel - [PATCH v4 1/6] arm64: dts: msm8916: Add i2c-qcom-cci node

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Message-Id: <20200408130959.2717409-2-robert.foss@linaro.org>
Date:   Wed,  8 Apr 2020 15:09:54 +0200
From:   Robert Foss <robert.foss@...aro.org>
To:     agross@...nel.org, bjorn.andersson@...aro.org, robh+dt@...nel.org,
        catalin.marinas@....com, will@...nel.org, shawnguo@...nel.org,
        leoyang.li@....com, Anson.Huang@....com, olof@...om.net,
        leonard.crestez@....com, geert+renesas@...der.be,
        marcin.juszkiewicz@...aro.org, valentin.schneider@....com,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        Loic Poulain <loic.poulain@...aro.org>,
        Luca Weiss <luca@...tu.xyz>
Cc:     Robert Foss <robert.foss@...aro.org>
Subject: [PATCH v4 1/6] arm64: dts: msm8916: Add i2c-qcom-cci node

From: Loic Poulain <loic.poulain@...aro.org>

The msm8916 CCI controller provides one CCI/I2C bus.

Signed-off-by: Loic Poulain <loic.poulain@...aro.org>
Signed-off-by: Robert Foss <robert.foss@...aro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@...aro.org>
---

Changes since v1:
 - Add label to cci node
 - Sort cci node by address
 - Relabel cci0 i2c bus to cci-i2c0

 arch/arm64/boot/dts/qcom/msm8916.dtsi | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index a88a15f2352b..cad0ac482367 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -1603,6 +1603,33 @@ ports {
 		};
 	};
 
+	cci: cci@...c000 {
+		compatible = "qcom,msm8916-cci";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x1b0c000 0x1000>;
+		interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
+		clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
+			<&gcc GCC_CAMSS_CCI_AHB_CLK>,
+			<&gcc GCC_CAMSS_CCI_CLK>,
+			<&gcc GCC_CAMSS_AHB_CLK>;
+		clock-names = "camss_top_ahb", "cci_ahb",
+				  "cci", "camss_ahb";
+		assigned-clocks = <&gcc GCC_CAMSS_CCI_AHB_CLK>,
+				  <&gcc GCC_CAMSS_CCI_CLK>;
+		assigned-clock-rates = <80000000>, <19200000>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&cci0_default>;
+		status = "disabled";
+
+		cci_i2c0: i2c-bus@0 {
+			reg = <0>;
+			clock-frequency = <400000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+	};
+
 	smd {
 		compatible = "qcom,smd";
 
-- 
2.25.1