linux-kernel - Re: [PATCH v3 10/10] drivers: qcom: rpmh-rsc: read_tcs_reg()/write_tcs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Wed, 8 Apr 2020 19:02:28 +0530
From:   Maulik Shah <mkshah@...eaurora.org>
To:     Douglas Anderson <dianders@...omium.org>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>
Cc:     mka@...omium.org, Lina Iyer <ilina@...eaurora.org>,
        Rajendra Nayak <rnayak@...eaurora.org>, swboyd@...omium.org,
        evgreen@...omium.org, linux-arm-msm@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 10/10] drivers: qcom: rpmh-rsc:
 read_tcs_reg()/write_tcs_reg() are not for IRQ

Hi,

Reviewed-by: Maulik Shah <mkshah@...eaurora.org>
Tested-by: Maulik Shah <mkshah@...eaurora.org>

Thanks,
Maulik

On 4/8/2020 5:20 AM, Douglas Anderson wrote:
> The RSC_DRV_IRQ_ENABLE, RSC_DRV_IRQ_STATUS, and RSC_DRV_IRQ_CLEAR
> registers are not part of TCS 0.  Let's not pretend that they are by
> using read_tcs_reg() and write_tcs_reg() and passing a bogus tcs_id of
> 0.  We could introduce a new wrapper for these registers but it
> wouldn't buy us much.  Let's just read/write directly.
>
> Signed-off-by: Douglas Anderson <dianders@...omium.org>
> ---
>
> Changes in v3:
> - ("...are not for IRQ") is new for v3.
>
> Changes in v2: None
>
>   drivers/soc/qcom/rpmh-rsc.c | 11 ++++++-----
>   1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/soc/qcom/rpmh-rsc.c b/drivers/soc/qcom/rpmh-rsc.c
> index a3b015196f15..31a998e6f2e9 100644
> --- a/drivers/soc/qcom/rpmh-rsc.c
> +++ b/drivers/soc/qcom/rpmh-rsc.c
> @@ -363,12 +363,12 @@ static void enable_tcs_irq(struct rsc_drv *drv, int tcs_id, bool enable)
>   {
>   	u32 data;
>   
> -	data = read_tcs_reg(drv, RSC_DRV_IRQ_ENABLE, 0);
> +	data = readl_relaxed(drv->tcs_base + RSC_DRV_IRQ_ENABLE);
>   	if (enable)
>   		data |= BIT(tcs_id);
>   	else
>   		data &= ~BIT(tcs_id);
> -	write_tcs_reg(drv, RSC_DRV_IRQ_ENABLE, 0, data);
> +	writel_relaxed(data, drv->tcs_base + RSC_DRV_IRQ_ENABLE);
>   }
>   
>   /**
> @@ -389,7 +389,7 @@ static irqreturn_t tcs_tx_done(int irq, void *p)
>   	const struct tcs_request *req;
>   	struct tcs_cmd *cmd;
>   
> -	irq_status = read_tcs_reg(drv, RSC_DRV_IRQ_STATUS, 0);
> +	irq_status = readl_relaxed(drv->tcs_base + RSC_DRV_IRQ_STATUS);
>   
>   	for_each_set_bit(i, &irq_status, BITS_PER_LONG) {
>   		req = get_req_from_tcs(drv, i);
> @@ -426,7 +426,7 @@ static irqreturn_t tcs_tx_done(int irq, void *p)
>   		/* Reclaim the TCS */
>   		write_tcs_reg(drv, RSC_DRV_CMD_ENABLE, i, 0);
>   		write_tcs_reg(drv, RSC_DRV_CMD_WAIT_FOR_CMPL, i, 0);
> -		write_tcs_reg(drv, RSC_DRV_IRQ_CLEAR, 0, BIT(i));
> +		writel_relaxed(BIT(i), drv->tcs_base + RSC_DRV_IRQ_CLEAR);
>   		spin_lock(&drv->lock);
>   		clear_bit(i, drv->tcs_in_use);
>   		/*
> @@ -969,7 +969,8 @@ static int rpmh_rsc_probe(struct platform_device *pdev)
>   	}
>   
>   	/* Enable the active TCS to send requests immediately */
> -	write_tcs_reg(drv, RSC_DRV_IRQ_ENABLE, 0, drv->tcs[ACTIVE_TCS].mask);
> +	writel_relaxed(drv->tcs[ACTIVE_TCS].mask,
> +		       drv->tcs_base + RSC_DRV_IRQ_ENABLE);
>   
>   	spin_lock_init(&drv->client.cache_lock);
>   	INIT_LIST_HEAD(&drv->client.cache);

-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation