linux-kernel - Re: [PATCH] arm64: dts: mt8173: Add gce setting in mmsys and display node

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Message-ID: <CAJMQK-iQvkQDnhL-LqCz57+3_GqU3EM5m=S2vGsOZuyGeXM74w@mail.gmail.com>
Date:   Thu, 9 Apr 2020 14:04:09 +0800
From:   Hsin-Yi Wang <hsinyi@...omium.org>
To:     Enric Balletbo i Serra <enric.balletbo@...labora.com>
Cc:     Chun-Kuang Hu <chunkuang.hu@...nel.org>,
        Enric Balletbo Serra <eballetbo@...il.com>,
        Mark Rutland <mark.rutland@....com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        Rob Herring <robh+dt@...nel.org>,
        "moderated list:ARM/Mediatek SoC support" 
        <linux-mediatek@...ts.infradead.org>,
        Bibby Hsieh <bibby.hsieh@...iatek.com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH] arm64: dts: mt8173: Add gce setting in mmsys and display node

On Thu, Apr 9, 2020 at 12:47 AM Enric Balletbo i Serra
<enric.balletbo@...labora.com> wrote:
>
> Hi Chun-Kuang
>
> Many thanks to let us know this, I completely missed.
>
> On 8/4/20 18:09, Chun-Kuang Hu wrote:
> > Hi, Hsin-Yi:
> >
> > Enric Balletbo Serra <eballetbo@...il.com> 於 2020年4月8日 週三 下午11:48寫道：
> >>
> >> Missatge de Hsin-Yi Wang <hsinyi@...omium.org> del dia dl., 18 de nov.
> >> 2019 a les 11:43:
> >>>
> >>> In order to use GCE function, we need add some informations
> >>> into display node (mboxes, mediatek,gce-client-reg, mediatek,gce-events).
> >>>
> >>> Signed-off-by: Hsin-Yi Wang <hsinyi@...omium.org>
> >>
> >> With the fix provided by Hsin-Yi [1] and after the mmsys patches
> >> landed I get GCE function working on mt8173, so
> >>
> >> Tested-by: Enric Balletbo i Serra <enric.balletbo@...labora.com>
> >>
> >> [1] https://lore.kernel.org/lkml/20200406051131.225748-1-hsinyi@chromium.org/
> >>
> >> Thanks,
> >>  Enric
> >>
> >>> ---
> >>> - This is based on series "support gce on mt8183 platform"
> >>>   https://patchwork.kernel.org/cover/11208309/
> >>> - gce setting in 8183:
> >>>   https://patchwork.kernel.org/patch/11127105/
> >>> ---
> >>>  arch/arm64/boot/dts/mediatek/mt8173.dtsi | 16 ++++++++++++++++
> >>>  1 file changed, 16 insertions(+)
> >>>
> >>> diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> >>> index 15f1842f6df3..e84ec3f95d81 100644
> >>> --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> >>> +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> >>> @@ -911,6 +911,11 @@ mmsys: clock-controller@...00000 {
> >>>                         assigned-clocks = <&topckgen CLK_TOP_MM_SEL>;
> >>>                         assigned-clock-rates = <400000000>;
> >>>                         #clock-cells = <1>;
> >>> +                       mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST 1>,
> >>> +                                <&gce 1 CMDQ_THR_PRIO_HIGHEST 1>;
> >
> > Because of patch [1], atomic_exec parameter should be removed.
> >
> > [1] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?h=next-20200408&id=19d8e335d58a961a7ed377e5e2e63664b92c0b9c
> >
>
> Many thanks to point this. Hsin-Yi, as the mt8173 device-tree will not land in
> current merge window (Matthias correct me if I am  wrong) maybe you could send a
> new version of the device-tree including these changes?
>
>
> >>> +                       mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
> >>> +                       mediatek,gce-events = <CMDQ_EVENT_MUTEX0_STREAM_EOF>,
> >>> +                                             <CMDQ_EVENT_MUTEX1_STREAM_EOF>;
> >
> > Because of patch [2], these events should be moved to mutex node.
> >
> > [2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?h=v5.6&id=60fa8c13ab1a33b8b958efb1510ec2fd8a064bcc
> >
>
> Hsin-Yi, note this will also impact your fixes patch [1].
>
> [1] https://lore.kernel.org/lkml/20200406051131.225748-1-hsinyi@chromium.org/
>
> Thanks,
>  Enric
>
> > Regards,
> > Chun-Kuang.
> >
Thanks for pointing this out.

v2: https://lore.kernel.org/lkml/20200409055012.199320-1-hsinyi@chromium.org/