[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <47a7593e-e035-1b48-c6d7-cd6f78a2f6e2@redhat.com>
Date: Thu, 9 Apr 2020 11:43:29 +0200
From: Paolo Bonzini <pbonzini@...hat.com>
To: Andy Lutomirski <luto@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>,
Andrew Cooper <andrew.cooper3@...rix.com>
Cc: Sean Christopherson <sean.j.christopherson@...el.com>,
Vivek Goyal <vgoyal@...hat.com>,
Peter Zijlstra <peterz@...radead.org>,
LKML <linux-kernel@...r.kernel.org>, X86 ML <x86@...nel.org>,
kvm list <kvm@...r.kernel.org>, stable <stable@...r.kernel.org>
Subject: Re: [PATCH v2] x86/kvm: Disable KVM_ASYNC_PF_SEND_ALWAYS
On 09/04/20 06:50, Andy Lutomirski wrote:
> The big problem is that #VE doesn't exist on AMD, and I really think
> that any fancy protocol we design should work on AMD. I have no
> problem with #VE being a nifty optimization to the protocol on Intel,
> but it should *work* without #VE.
Yes and unfortunately AMD does not like to inject a non-existing
exception. Intel only requires the vector to be <=31, but AMD wants the
vector to correspond to an exception.
However, software injection is always possible and AMD even suggests
that you use software injection for ICEBP and, on older processors, the
INT instruction.
Paolo
Powered by blists - more mailing lists