[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CABymUCNdX=K1vFuC0Rt-u0h-CRYcKtXogyOkAiGZpDfKSVAYqA@mail.gmail.com>
Date: Fri, 10 Apr 2020 16:36:03 +0800
From: Jun Nie <jun.nie@...aro.org>
To: Rajendra Nayak <rnayak@...eaurora.org>
Cc: Viresh Kumar <viresh.kumar@...aro.org>, sboyd@...nel.org,
Bjorn Andersson <bjorn.andersson@...aro.org>,
agross@...nel.org, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Akash Asthana <akashast@...eaurora.org>,
linux-serial@...r.kernel.org, Matthias Kaehlcke <mka@...omium.org>
Subject: Re: [PATCH 02/21] tty: serial: qcom_geni_serial: Use OPP API to set
clk/perf state
> > @@ -961,7 +962,7 @@ static void qcom_geni_serial_set_termios(struct uart_port *uport,
> > goto out_restart_rx;
> >
> > uport->uartclk = clk_rate;
> > - clk_set_rate(port->se.clk, clk_rate);
> > + dev_pm_opp_set_rate(uport->dev, clk_rate);
Hi Rajendra,
I see lowest rpmhpd_opp_low_svs opp is for 75MHz. It is a bit higher
for a serial.
I am just curious about this.
I also want to confirm that the rpmhpd_opp_low_svs voltage restriction
is for serial
controller, not for clock controller? Because I see there is similar
restriction to clock
controller on another platform, the restriction is for branch clock,
not leaf clock that
consumer device will get.
Jun
Powered by blists - more mailing lists