[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20200410183420.GE25745@shell.armlinux.org.uk>
Date: Fri, 10 Apr 2020 19:34:20 +0100
From: Russell King - ARM Linux admin <linux@...linux.org.uk>
To: Andrew Lunn <andrew@...n.ch>
Cc: Jian Cai <caij2003@...il.com>,
Linus Walleij <linus.walleij@...aro.org>, Peter.Smith@....com,
stefan@...er.ch, David Howells <dhowells@...hat.com>,
Mauro Carvalho Chehab <mchehab+samsung@...nel.org>,
manojgupta@...gle.com,
Benjamin Gaignard <benjamin.gaignard@...aro.org>,
"Joel Fernandes (Google)" <joel@...lfernandes.org>,
clang-built-linux@...glegroups.com, ilie.halip@...il.com,
Masahiro Yamada <masahiroy@...nel.org>,
Krzysztof Kozlowski <krzk@...nel.org>,
Bartosz Golaszewski <bgolaszewski@...libre.com>,
samitolvanen@...gle.com,
"Eric W. Biederman" <ebiederm@...ssion.com>,
Arnd Bergmann <arnd@...db.de>,
"Steven Rostedt (VMware)" <rostedt@...dmis.org>,
jiancai@...gle.com, Doug Anderson <armlinux@...isordat.com>,
Dan Williams <dan.j.williams@...el.com>,
linux-arm-kernel@...ts.infradead.org,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
ndesaulniers@...gle.com, linux-kernel@...r.kernel.org,
Patrick Bellasi <patrick.bellasi@....com>,
Masami Hiramatsu <mhiramat@...nel.org>,
Tejun Heo <tj@...nel.org>,
Andrew Morton <akpm@...ux-foundation.org>
Subject: Re: [PATCH] ARM: do not assemble iwmmxt.S with LLVM toolchain
On Fri, Apr 10, 2020 at 06:59:48PM +0200, Andrew Lunn wrote:
> On Thu, Apr 09, 2020 at 04:27:26PM -0700, Jian Cai wrote:
> > iwmmxt.S contains XScale instructions
>
> Dumb question....
>
> Are these Xscale instructions? My understanding is that they are an
> instruction set of their own, implementing something similar to IA-32
> MMX.
>
> Would it be more accurate to say CLANG does not support the iwmmxt
> instruction set?
Yes, because the XScale core on its own (otherwise known as 80200)
doesn't support iWMMXT.
It's worth pointing out that the iWMMXT instruction set uses the
co-processor #1 instruction space as defined by the ARMv5 ARM ARM,
which is also the FPA (floating point accelerator) instruction
space - which is the FP instruction set prior to VFP.
The LDFP and similar instructions that binutils decodes the opcodes
as are FPA instructions, and the LDC2 instructions are their "generic
co-processor" versions where there's no FPA instruction that matches
the op-code.
I'll also point out that the reason the iWMMXT code has never been
ported to Thumb2 is because there are no equivalents for the
co-processor instructions in the Thumb2 instruction set defined in
ARMv5. Hence why the file has a .arm. So, the fact the file hasn't
changed for a long time and hasn't been updated with "improvements"
such as Thumb2 kernels is because that's completely irrelevent to
the ISA.
It is an example of code that has become stable and mature, and
requires no maintanence with GNU toolchains.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 10.2Mbps down 587kbps up
Powered by blists - more mailing lists