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Date:   Sat, 11 Apr 2020 11:44:35 +0800
From:   Guo Ren <guoren@...nel.org>
To:     Zong Li <zong.li@...ive.com>
Cc:     Palmer Dabbelt <palmer@...belt.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        linux-riscv <linux-riscv@...ts.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] riscv: remove the assert of lock for cpu_running

Acked-by: Guo Ren <guoren@...nel.org>

Haha, are you working on lockdep ? Me too, here is my patch, not finished.

It's still warning at begin, I've no time to debug, and it's similar to csky's:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/arch/csky?id=000591f1ca3312d9a29e15a9e3fe5c4171f75586

If you are working on LOCKDEP, I'll wait your patch :)

commit 096d7a4b26d21aa7c71c86f200241144569e697a (riscv-lockdep)
Author: Guo Ren <guoren@...ux.alibaba.com>
Date:   Fri Apr 10 16:38:37 2020 +0800

    riscv: Enable LOCKDEP_SUPPORT

    Lockdep is needed by proving the spinlocks and rwlocks.

    Signed-off-by: Guo Ren <guoren@...ux.alibaba.com>

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 8672e77a5b7a..bfe76c76a107 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -163,6 +163,9 @@ config PGTABLE_LEVELS
        default 3 if 64BIT
        default 2

+config LOCKDEP_SUPPORT
+       def_bool y
+
 source "arch/riscv/Kconfig.socs"

 menu "Platform type"
diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
index 208702d8c18e..41588ee74cb2 100644
--- a/arch/riscv/kernel/entry.S
+++ b/arch/riscv/kernel/entry.S
@@ -175,6 +175,24 @@ ENTRY(handle_exception)
 .option pop

        la ra, ret_from_exception
+#ifdef CONFIG_TRACE_IRQFLAGS
+       call trace_hardirqs_off
+       la ra, ret_from_exception
+       REG_L s0, PT_SP(sp)
+       REG_L s1, PT_STATUS(sp)
+       REG_L s2, PT_EPC(sp)
+       REG_L s3, PT_BADADDR(sp)
+       REG_L s4, PT_CAUSE(sp)
+       REG_L s5, PT_TP(sp)
+       REG_L a0, PT_A0(sp)
+       REG_L a1, PT_A1(sp)
+       REG_L a2, PT_A2(sp)
+       REG_L a3, PT_A3(sp)
+       REG_L a4, PT_A4(sp)
+       REG_L a5, PT_A5(sp)
+       REG_L a6, PT_A6(sp)
+       REG_L a7, PT_A7(sp)
+#endif
        /*
         * MSB of cause differentiates between
         * interrupts and exceptions
@@ -191,6 +209,24 @@ ENTRY(handle_exception)
         */
        andi t0, s1, SR_PIE
        beqz t0, 1f
+#ifdef CONFIG_TRACE_IRQFLAGS
+       call trace_hardirqs_on
+       la ra, ret_from_exception
+       REG_L s0, PT_SP(sp)
+       REG_L s1, PT_STATUS(sp)
+       REG_L s2, PT_EPC(sp)
+       REG_L s3, PT_BADADDR(sp)
+       REG_L s4, PT_CAUSE(sp)
+       REG_L s5, PT_TP(sp)
+       REG_L a0, PT_A0(sp)
+       REG_L a1, PT_A1(sp)
+       REG_L a2, PT_A2(sp)
+       REG_L a3, PT_A3(sp)
+       REG_L a4, PT_A4(sp)
+       REG_L a5, PT_A5(sp)
+       REG_L a6, PT_A6(sp)
+       REG_L a7, PT_A7(sp)
+#endif
        csrs CSR_STATUS, SR_IE

 1:
@@ -291,6 +327,31 @@ resume_userspace:
        csrw CSR_SCRATCH, tp

 restore_all:
+#ifdef CONFIG_TRACE_IRQFLAGS
+       REG_L s1, PT_STATUS(sp)
+       andi t0, s1, SR_PIE
+       beqz t0, 1f
+       call trace_hardirqs_on
+       j 2f
+1:
+       call trace_hardirqs_off
+2:
+       la ra, ret_from_exception
+       REG_L s0, PT_SP(sp)
+       REG_L s1, PT_STATUS(sp)
+       REG_L s2, PT_EPC(sp)
+       REG_L s3, PT_BADADDR(sp)
+       REG_L s4, PT_CAUSE(sp)
+       REG_L s5, PT_TP(sp)
+       REG_L a0, PT_A0(sp)
+       REG_L a1, PT_A1(sp)
+       REG_L a2, PT_A2(sp)
+       REG_L a3, PT_A3(sp)
+       REG_L a4, PT_A4(sp)
+       REG_L a5, PT_A5(sp)
+       REG_L a6, PT_A6(sp)
+       REG_L a7, PT_A7(sp)
+#endif
        RESTORE_ALL
 #ifdef CONFIG_RISCV_M_MODE
        mret
diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
index 8bc01f0ca73b..54fd70eb50bd 100644
--- a/arch/riscv/kernel/smpboot.c
+++ b/arch/riscv/kernel/smpboot.c
@@ -115,7 +115,7 @@ int __cpu_up(unsigned int cpu, struct task_struct *tidle)
                  task_stack_page(tidle) + THREAD_SIZE);
        WRITE_ONCE(__cpu_up_task_pointer[hartid], tidle);

-       lockdep_assert_held(&cpu_running);
+//     lockdep_assert_held(&cpu_running);
        wait_for_completion_timeout(&cpu_running,
                                            msecs_to_jiffies(1000));

On Fri, Apr 10, 2020 at 11:26 AM Zong Li <zong.li@...ive.com> wrote:
>
> The cpu_running is not a lock-class, it lacks the dep_map member in
> completion. It causes the error as follow:
>
> arch/riscv/kernel/smpboot.c: In function '__cpu_up':
> ./include/linux/lockdep.h:364:52: error: 'struct completion' has no member named 'dep_map'
>   364 | #define lockdep_is_held(lock)  lock_is_held(&(lock)->dep_map)
>       |                                                    ^~
> ./include/asm-generic/bug.h:113:25: note: in definition of macro 'WARN_ON'
>   113 |  int __ret_warn_on = !!(condition);    \
>       |                         ^~~~~~~~~
> ./include/linux/lockdep.h:390:27: note: in expansion of macro 'lockdep_is_held'
>   390 |   WARN_ON(debug_locks && !lockdep_is_held(l)); \
>       |                           ^~~~~~~~~~~~~~~
> arch/riscv/kernel/smpboot.c:118:2: note: in expansion of macro 'lockdep_assert_held'
>   118 |  lockdep_assert_held(&cpu_running);
>
> Signed-off-by: Zong Li <zong.li@...ive.com>
> ---
>  arch/riscv/kernel/smpboot.c | 1 -
>  1 file changed, 1 deletion(-)
>
> diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
> index 8bc01f0ca73b..bbc1baa2d90c 100644
> --- a/arch/riscv/kernel/smpboot.c
> +++ b/arch/riscv/kernel/smpboot.c
> @@ -115,7 +115,6 @@ int __cpu_up(unsigned int cpu, struct task_struct *tidle)
>                   task_stack_page(tidle) + THREAD_SIZE);
>         WRITE_ONCE(__cpu_up_task_pointer[hartid], tidle);
>
> -       lockdep_assert_held(&cpu_running);
>         wait_for_completion_timeout(&cpu_running,
>                                             msecs_to_jiffies(1000));
>
> --
> 2.26.0
>
>


-- 
Best Regards
 Guo Ren

ML: https://lore.kernel.org/linux-csky/

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