linux-kernel - Re: [PATCH 02/21] tty: serial: qcom_geni_serial: Use OPP API to set clk/perf state

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Message-ID: <e3aa9e6f-14f5-de51-7087-094b5089d16b@codeaurora.org>
Date:   Mon, 13 Apr 2020 19:28:39 +0530
From:   Rajendra Nayak <rnayak@...eaurora.org>
To:     Matthias Kaehlcke <mka@...omium.org>
Cc:     viresh.kumar@...aro.org, sboyd@...nel.org,
        bjorn.andersson@...aro.org, agross@...nel.org,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        Akash Asthana <akashast@...eaurora.org>,
        linux-serial@...r.kernel.org
Subject: Re: [PATCH 02/21] tty: serial: qcom_geni_serial: Use OPP API to set
 clk/perf state

Hi Matthias,

On 4/9/2020 11:15 PM, Matthias Kaehlcke wrote:
> Hi Rajendra,
> 
> On Wed, Apr 08, 2020 at 07:16:28PM +0530, Rajendra Nayak wrote:
>> geni serial needs to express a perforamnce state requirement on CX
>> depending on the frequency of the clock rates. Use OPP table from
>> DT to register with OPP framework and use dev_pm_opp_set_rate() to
>> set the clk/perf state.
>>
>> Signed-off-by: Rajendra Nayak <rnayak@...eaurora.org>
>> Cc: Akash Asthana <akashast@...eaurora.org>
>> Cc: linux-serial@...r.kernel.org
>> ---
>>   drivers/tty/serial/qcom_geni_serial.c | 20 +++++++++++++++-----
>>   include/linux/qcom-geni-se.h          |  2 ++
>>   2 files changed, 17 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c
>> index 6119090..754eaf6 100644
>> --- a/drivers/tty/serial/qcom_geni_serial.c
>> +++ b/drivers/tty/serial/qcom_geni_serial.c
>> @@ -9,6 +9,7 @@
>>   #include <linux/module.h>
>>   #include <linux/of.h>
>>   #include <linux/of_device.h>
>> +#include <linux/pm_opp.h>
>>   #include <linux/platform_device.h>
>>   #include <linux/pm_runtime.h>
>>   #include <linux/pm_wakeirq.h>
>> @@ -961,7 +962,7 @@ static void qcom_geni_serial_set_termios(struct uart_port *uport,
>>   		goto out_restart_rx;
>>   
>>   	uport->uartclk = clk_rate;
>> -	clk_set_rate(port->se.clk, clk_rate);
>> +	dev_pm_opp_set_rate(uport->dev, clk_rate);
>>   	ser_clk_cfg = SER_CLK_EN;
>>   	ser_clk_cfg |= clk_div << CLK_DIV_SHFT;
>>   
>> @@ -1198,8 +1199,10 @@ static void qcom_geni_serial_pm(struct uart_port *uport,
>>   	if (new_state == UART_PM_STATE_ON && old_state == UART_PM_STATE_OFF)
>>   		geni_se_resources_on(&port->se);
>>   	else if (new_state == UART_PM_STATE_OFF &&
>> -			old_state == UART_PM_STATE_ON)
>> +			old_state == UART_PM_STATE_ON) {
>> +		dev_pm_opp_set_rate(uport->dev, 0);
>>   		geni_se_resources_off(&port->se);
>> +	}
>>   }
>>   
>>   static const struct uart_ops qcom_geni_console_pops = {
>> @@ -1318,13 +1321,16 @@ static int qcom_geni_serial_probe(struct platform_device *pdev)
>>   	if (of_property_read_bool(pdev->dev.of_node, "cts-rts-swap"))
>>   		port->cts_rts_swap = true;
>>   
>> +	port->se.opp = dev_pm_opp_set_clkname(&pdev->dev, "se");
> 
> dev_pm_opp_set_clkname() can fail for multiple reasons, it seems an error
> check would be warranted.

right, looks like I should put some error check there

> Is it actually necessary to save the OPP table in 'struct geni_se'? Both
> the serial and the SPI driver save the table, but don't use it later (nor
> does the SE driver).

I think I did that initially because I wanted to use that to call into
dev_pm_opp_put_clkname during cleanup. That however never worked since
the way the clk_put is done in dev_pm_opp_put_clkname() and _opp_table_kref_release()
seems buggy. I kind of forgot about fixing it up, I will figure our whats the right
way to do it, and either not call dev_pm_opp_put_clkname() or not store the
opp table returned by it.

thanks for taking time to review.

- Rajendra
  

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