linux-kernel - Re: [PATCH 2/4] drivers: pci: dwc: pci-imx6: update binding to generic name

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Message-ID: <20200413202546.GA147401@google.com>
Date:   Mon, 13 Apr 2020 15:25:46 -0500
From:   Bjorn Helgaas <helgaas@...nel.org>
To:     Ansuel Smith <ansuelsmth@...il.com>
Cc:     devicetree@...r.kernel.org, Richard Zhu <hongxing.zhu@....com>,
        Lucas Stach <l.stach@...gutronix.de>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        Fabio Estevam <festevam@...il.com>,
        NXP Linux Team <linux-imx@....com>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Andrew Murray <amurray@...goodpenguin.co.uk>,
        linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/4] drivers: pci: dwc: pci-imx6: update binding to
 generic name

If/when you repost this, please update the subject to match the
convention:

  $ git log --oneline drivers/pci/controller/dwc/pci-imx6.c
  2170a09fb4b0 PCI: imx6: Propagate errors for optional regulators
  075af61c19cd PCI: imx6: Limit DBI register length
  1b8df7aa7874 PCI: imx6: Allow asynchronous probing
  87cb312777b5 PCI: imx6: Use usleep_range() in imx6_pcie_enable_ref_clk()

As Fabio pointed out, we can't break backward compatibility without a
good reason.

On Fri, Apr 10, 2020 at 02:47:36AM +0200, Ansuel Smith wrote:
> Rename specific bindings to generic name.
> 
> Signed-off-by: Ansuel Smith <ansuelsmth@...il.com>
> ---
>  drivers/pci/controller/dwc/pci-imx6.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index acfbd34032a8..4ac140e007b4 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -1146,28 +1146,28 @@ static int imx6_pcie_probe(struct platform_device *pdev)
>  	}
>  
>  	/* Grab PCIe PHY Tx Settings */
> -	if (of_property_read_u32(node, "fsl,tx-deemph-gen1",
> +	if (of_property_read_u32(node, "tx-deemph-gen1",
>  				 &imx6_pcie->tx_deemph_gen1))
>  		imx6_pcie->tx_deemph_gen1 = 0;
>  
> -	if (of_property_read_u32(node, "fsl,tx-deemph-gen2-3p5db",
> +	if (of_property_read_u32(node, "tx-deemph-gen2-3p5db",
>  				 &imx6_pcie->tx_deemph_gen2_3p5db))
>  		imx6_pcie->tx_deemph_gen2_3p5db = 0;
>  
> -	if (of_property_read_u32(node, "fsl,tx-deemph-gen2-6db",
> +	if (of_property_read_u32(node, "tx-deemph-gen2-6db",
>  				 &imx6_pcie->tx_deemph_gen2_6db))
>  		imx6_pcie->tx_deemph_gen2_6db = 20;
>  
> -	if (of_property_read_u32(node, "fsl,tx-swing-full",
> +	if (of_property_read_u32(node, "tx-swing-full",
>  				 &imx6_pcie->tx_swing_full))
>  		imx6_pcie->tx_swing_full = 127;
>  
> -	if (of_property_read_u32(node, "fsl,tx-swing-low",
> +	if (of_property_read_u32(node, "tx-swing-low",
>  				 &imx6_pcie->tx_swing_low))
>  		imx6_pcie->tx_swing_low = 127;
>  
>  	/* Limit link speed */
> -	ret = of_property_read_u32(node, "fsl,max-link-speed",
> +	ret = of_property_read_u32(node, "max-link-speed",
>  				   &imx6_pcie->link_gen);
>  	if (ret)
>  		imx6_pcie->link_gen = 1;
> -- 
> 2.25.1
>