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Message-ID: <20200414181054.GA6655@bogus>
Date:   Tue, 14 Apr 2020 13:10:54 -0500
From:   Rob Herring <robh@...nel.org>
To:     Thierry Reding <thierry.reding@...il.com>
Cc:     Daniel Lezcano <daniel.lezcano@...aro.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Thierry Reding <thierry.reding@...il.com>,
        Dmitry Osipenko <digetx@...il.com>,
        Jon Hunter <jonathanh@...dia.com>, devicetree@...r.kernel.org,
        linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 1/7] dt-bindings: timer: Add bindings for NVIDIA
 Tegra186 timers

On Fri,  3 Apr 2020 22:22:03 +0200, Thierry Reding wrote:
> From: Thierry Reding <treding@...dia.com>
> 
> The NVIDIA Tegra186 SoC contains an IP block that provides a register
> interface for ten timers with a 29-bit counter that can generate one-
> shot, periodic or watchdog interrupts.
> 
> Signed-off-by: Thierry Reding <treding@...dia.com>
> ---
> Changes in v2:
> - add required properties section
> - add additionalProperties: false
> - do not show status in example
> 
>  .../bindings/timer/nvidia,tegra186-timer.yaml | 61 +++++++++++++++++++
>  1 file changed, 61 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/timer/nvidia,tegra186-timer.yaml
> 

Reviewed-by: Rob Herring <robh@...nel.org>

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