linux-kernel - Re: [PATCH v9 00/17] Enable FSGSBASE instructions

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Message-ID: <20200414003205.GF397326@tassilo.jf.intel.com>
Date:   Mon, 13 Apr 2020 17:32:05 -0700
From:   Andi Kleen <ak@...ux.intel.com>
To:     Sasha Levin <sashal@...nel.org>
Cc:     "Bae, Chang Seok" <chang.seok.bae@...el.com>,
        Andy Lutomirski <luto@...nel.org>,
        "Metzger, Markus T" <markus.t.metzger@...el.com>,
        "hpa@...or.com" <hpa@...or.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        "bp@...en8.de" <bp@...en8.de>,
        "Hansen, Dave" <dave.hansen@...el.com>,
        "Luck, Tony" <tony.luck@...el.com>,
        Pedro Alves <palves@...hat.com>,
        Simon Marchi <simark@...ark.ca>,
        "Shankar, Ravi V" <ravi.v.shankar@...el.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v9 00/17] Enable FSGSBASE instructions

> Is my attempt at understanding the current situation correct?

Yes.

Nothing breaks, and it's a nice improvement for context switch
performance, in NMI/PMU performance, and also gives user space two free
registers to play around with.

-Andi