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Date: Wed, 15 Apr 2020 18:00:29 +0100 From: Will Deacon <will@...nel.org> To: Marc Zyngier <maz@...nel.org> Cc: linux-arm-kernel@...ts.infradead.org, kvmarm@...ts.cs.columbia.edu, linux-kernel@...r.kernel.org, Suzuki K Poulose <suzuki.poulose@....com>, Mark Rutland <mark.rutland@....com>, Anshuman Khandual <anshuman.khandual@....com>, Catalin Marinas <catalin.marinas@....com>, Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>, Doug Anderson <dianders@...omium.org>, kernel-team@...roid.com Subject: Re: [PATCH 3/8] arm64: cpufeature: Add CPU capability for AArch32 EL1 support Hi Marc, On Wed, Apr 15, 2020 at 09:55:57AM +0100, Marc Zyngier wrote: > On 2020-04-14 22:31, Will Deacon wrote: > > Although we emit a "SANITY CHECK" warning and taint the kernel if we > > detect a CPU mismatch for AArch32 support at EL1, we still online the > > CPU with disastrous consequences for any running 32-bit VMs. > > > > Introduce a capability for AArch32 support at EL1 so that late onlining > > of incompatible CPUs is forbidden. > > > > Signed-off-by: Will Deacon <will@...nel.org> > > Definitely an improvement over the current situation, as the direct read > of ID_AA64PFR0 was always a bit dodgy. Given that I'm pretty sure these new > braindead SoCs are going to run an older version of the kernel, should we > Cc stable for this? I don't think there's a real need for -stable given that we do at least taint the kernel. That's likely to annoy vendors enough to backport this themselves ;) Will
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