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Message-ID: <af02a837-c5a9-4d0a-34a4-534e155ac968@intel.com>
Date: Wed, 15 Apr 2020 10:19:24 +0300
From: Adrian Hunter <adrian.hunter@...el.com>
To: Masahiro Yamada <yamada.masahiro@...ionext.com>,
linux-mmc@...r.kernel.org
Cc: linux-kernel@...r.kernel.org, Ulf Hansson <ulf.hansson@...aro.org>,
masahiroy@...nel.org
Subject: Re: [PATCH 1/2] mmc: sdhci: move SDHCI_CAPABILITIES_1 to a more
suitable place
On 8/04/20 10:21 am, Masahiro Yamada wrote:
> In the SDHCI specification, the Capabilities Register (Offset 0x40h)
> is the 64-bit width register, but in Linux, it is represented as two
> registers, SDHCI_CAPABILITIES and SDHCI_CAPABILITIES_1 so that drivers
> can use 32-bit register accessors.
>
> The upper 32-bit field is associated with SDHCI_CAPABILITIES_1.
>
> Move the definition of SDHCI_CAPABILITIES_1 to the correct place.
>
> Signed-off-by: Masahiro Yamada <yamada.masahiro@...ionext.com>
Acked-by: Adrian Hunter <adrian.hunter@...el.com>
> ---
>
> drivers/mmc/host/sdhci.h | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
> index 79dffbb731d3..b786b68e0302 100644
> --- a/drivers/mmc/host/sdhci.h
> +++ b/drivers/mmc/host/sdhci.h
> @@ -220,6 +220,7 @@
> #define SDHCI_CAN_64BIT_V4 0x08000000
> #define SDHCI_CAN_64BIT 0x10000000
>
> +#define SDHCI_CAPABILITIES_1 0x44
> #define SDHCI_SUPPORT_SDR50 0x00000001
> #define SDHCI_SUPPORT_SDR104 0x00000002
> #define SDHCI_SUPPORT_DDR50 0x00000004
> @@ -236,8 +237,6 @@
> #define SDHCI_CAN_DO_ADMA3 0x08000000
> #define SDHCI_SUPPORT_HS400 0x80000000 /* Non-standard */
>
> -#define SDHCI_CAPABILITIES_1 0x44
> -
> #define SDHCI_MAX_CURRENT 0x48
> #define SDHCI_MAX_CURRENT_LIMIT 0xFF
> #define SDHCI_MAX_CURRENT_330_MASK 0x0000FF
>
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