linux-kernel - Re: [PATCH 2/8] arm64: cpufeature: Spell out register fields for ID_ISAR4 and ID

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Message-ID: <632b7ace-a7db-a961-b9eb-c9c303376fcd@arm.com>
Date:   Wed, 15 Apr 2020 11:09:12 +0100
From:   Suzuki K Poulose <suzuki.poulose@....com>
To:     will@...nel.org, linux-arm-kernel@...ts.infradead.org,
        kvmarm@...ts.cs.columbia.edu
Cc:     linux-kernel@...r.kernel.org, mark.rutland@....com, maz@...nel.org,
        anshuman.khandual@....com, catalin.marinas@....com,
        saiprakash.ranjan@...eaurora.org, dianders@...omium.org,
        kernel-team@...roid.com
Subject: Re: [PATCH 2/8] arm64: cpufeature: Spell out register fields for
 ID_ISAR4 and ID_PFR1

On 04/14/2020 10:31 PM, Will Deacon wrote:
> In preparation for runtime updates to the strictness of some AArch32
> features, spell out the register fields for ID_ISAR4 and ID_PFR1 to make
> things clearer to read. Note that this isn't functionally necessary, as
> the feature arrays themselves are not modified dynamically and remain
> 'const'.
> 
> Signed-off-by: Will Deacon <will@...nel.org>
> ---
>   arch/arm64/include/asm/sysreg.h | 17 +++++++++++++++++
>   arch/arm64/kernel/cpufeature.c  | 28 ++++++++++++++++++++++++++--
>   2 files changed, 43 insertions(+), 2 deletions(-)

Reviewed-by: Suzuki K Poulose <suzuki.poulose@....com>