[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <b648691c-e9cd-f0eb-2ed2-50451a4bceb8@arm.com>
Date: Wed, 15 Apr 2020 11:43:36 +0100
From: Suzuki K Poulose <suzuki.poulose@....com>
To: will@...nel.org, linux-arm-kernel@...ts.infradead.org,
kvmarm@...ts.cs.columbia.edu
Cc: linux-kernel@...r.kernel.org, mark.rutland@....com, maz@...nel.org,
anshuman.khandual@....com, catalin.marinas@....com,
saiprakash.ranjan@...eaurora.org, dianders@...omium.org,
kernel-team@...roid.com
Subject: Re: [PATCH 6/8] arm64: cpufeature: Relax AArch32 system checks if EL1
is 64-bit only
On 04/14/2020 10:31 PM, Will Deacon wrote:
> If AArch32 is not supported at EL1, the AArch32 feature register fields
> no longer advertise support for some system features:
>
> * ISAR4.SMC
> * PFR1.{Virt_frac, Sec_frac, Virtualization, Security, ProgMod}
>
> In which case, we don't need to emit "SANITY CHECK" failures for all of
> them.
>
> Add logic to relax the strictness of individual feature register fields
> at runtime and use this for the fields above if 32-bit EL1 is not
> supported.
>
> Signed-off-by: Will Deacon <will@...nel.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@....com>
Powered by blists - more mailing lists