linux-kernel - Re: [PATCH] x86, smpboot: Disable frequency invariance when it's unsupported

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Message-ID: <1587060573.32139.67.camel@suse.cz>
Date:   Thu, 16 Apr 2020 20:09:33 +0200
From:   Giovanni Gherdovich <ggherdovich@...e.cz>
To:     Like Xu <like.xu@...ux.intel.com>
Cc:     Peter Zijlstra <peterz@...radead.org>,
        Ingo Molnar <mingo@...nel.org>,
        Doug Smythies <dsmythies@...us.net>,
        "Rafael J . Wysocki" <rafael.j.wysocki@...el.com>,
        LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] x86, smpboot: Disable frequency invariance when it's
 unsupported

On Thu, 2020-04-16 at 20:54 +0800, Like Xu wrote:
> On 2020/4/16 16:40, Giovanni Gherdovich wrote:
> > [...]
> > 1) Can you share the output of "turbostat --interval 1 sleep 0"? I'm
> >     interested in the headers of the output, where all the various pm-related
> >     MSRs are decoded.
> > 
> 
> I couldn't disclose more information about this.

No worries, I understand.

> 
> > 2) Despite not being in the Intel SDM, I was under the assumption that all
> >     Intel CPUs declare the "all-cores turbo" frequency, but it's not the case
> >     for this one. Eg: if you have 24 cores, somewhere in your MSRs I'd expect
> >     to find "24C turbo" (or even "30C turbo", anything greater or equal than 24).
> >     My understanding from
> >     https://ark.intel.com/content/www/us/en/ark/products/202682/intel-atom-processor-p5962b-27m-cache-2-20-ghz.html
> >     is that this CPU doesn't support turbo boost at all; in other CPUs without
> >     turbo I've seen MSRs saying the all-cores turbo freq is equal to the base
> >     freq (for compatibility I suppose). Here MSR_TURBO_RATIO_LIMIT says that 1C
> >     turbo is the same as base frequency (2.2GHz), but turbo for larger sets of
> >     cores is declared as zero, which I find a little odd.
> 
> That's odd and we could only rely on the Intel specification
> about the assumption "Intel CPUs declare the all-cores turbo frequency"
> and I may report this issue if something does mismatch.

Ok.

> 
> > 
> > 3) The parsing of MSRs in the frequency invariance code is modeled after
> >     turbostat, and classifies CPUs in 5 groups: Atom up to Goldmont, Atom from
> >     Goldmont onwards, Xeon Phi, Xeon Scalable Processors onwards and "generic
> >     Core". As you've already found out from where your panic happens, your Atom
> >     falls into the "generic Core" category (function core_set_max_freq_ratio()),
> >     but given that it's an Atom and it's been released this very quarter I'd
> >     have guessed it to behave like a Goldmont. Something for me to keep in mind.
> 
> It's INTEL_FAM6_ATOM_TREMONT or INTEL_FAM6_ATOM_TREMONT_D.
> 

Thanks! The model name from intel-family.h is useful!


Giovanni