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Message-ID: <20200416084910.GX2167633@dell>
Date:   Thu, 16 Apr 2020 09:49:10 +0100
From:   Lee Jones <lee.jones@...aro.org>
To:     Hsin-Hsiung Wang <hsin-hsiung.wang@...iatek.com>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Alexandre Belloni <alexandre.belloni@...tlin.com>,
        Nicolas Boichat <drinkcat@...omium.org>,
        Mark Rutland <mark.rutland@....com>,
        Sean Wang <sean.wang@...iatek.com>,
        Sebastian Reichel <sre@...nel.org>,
        Eddie Huang <eddie.huang@...iatek.com>,
        Alessandro Zummo <a.zummo@...ertech.it>,
        Kate Stewart <kstewart@...uxfoundation.org>,
        Richard Fontana <rfontana@...hat.com>,
        Frank Wunderlich <frank-w@...lic-files.de>,
        Josef Friedl <josef.friedl@...ed.at>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ran Bi <ran.bi@...iatek.com>, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-pm@...r.kernel.org, linux-rtc@...r.kernel.org,
        srv_heupstream@...iatek.com
Subject: Re: [PATCH v12 1/6] mfd: mt6397: Modify suspend/resume behavior

On Wed, 08 Apr 2020, Hsin-Hsiung Wang wrote:

> Some pmics don't need backup interrupt settings, so we change to use
> pm notifier for the pmics which are necessary to store settings.
> 
> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@...iatek.com>
> ---
>  drivers/mfd/mt6397-core.c       | 30 ------------------------------
>  drivers/mfd/mt6397-irq.c        | 35 ++++++++++++++++++++++++++++++++++-
>  include/linux/mfd/mt6397/core.h |  2 ++
>  3 files changed, 36 insertions(+), 31 deletions(-)
> 
> diff --git a/drivers/mfd/mt6397-core.c b/drivers/mfd/mt6397-core.c
> index 0437c85..d2e70d8 100644
> --- a/drivers/mfd/mt6397-core.c
> +++ b/drivers/mfd/mt6397-core.c
> @@ -100,35 +100,6 @@ static const struct mfd_cell mt6397_devs[] = {
>  	}
>  };
>  
> -#ifdef CONFIG_PM_SLEEP
> -static int mt6397_irq_suspend(struct device *dev)
> -{
> -	struct mt6397_chip *chip = dev_get_drvdata(dev);
> -
> -	regmap_write(chip->regmap, chip->int_con[0], chip->wake_mask[0]);
> -	regmap_write(chip->regmap, chip->int_con[1], chip->wake_mask[1]);
> -
> -	enable_irq_wake(chip->irq);
> -
> -	return 0;
> -}
> -
> -static int mt6397_irq_resume(struct device *dev)
> -{
> -	struct mt6397_chip *chip = dev_get_drvdata(dev);
> -
> -	regmap_write(chip->regmap, chip->int_con[0], chip->irq_masks_cur[0]);
> -	regmap_write(chip->regmap, chip->int_con[1], chip->irq_masks_cur[1]);
> -
> -	disable_irq_wake(chip->irq);
> -
> -	return 0;
> -}
> -#endif
> -
> -static SIMPLE_DEV_PM_OPS(mt6397_pm_ops, mt6397_irq_suspend,
> -			mt6397_irq_resume);
> -
>  struct chip_data {
>  	u32 cid_addr;
>  	u32 cid_shift;
> @@ -238,7 +209,6 @@ static struct platform_driver mt6397_driver = {
>  	.driver = {
>  		.name = "mt6397",
>  		.of_match_table = of_match_ptr(mt6397_of_match),
> -		.pm = &mt6397_pm_ops,
>  	},
>  	.id_table = mt6397_id,
>  };
> diff --git a/drivers/mfd/mt6397-irq.c b/drivers/mfd/mt6397-irq.c
> index b2d3ce1..2924919 100644
> --- a/drivers/mfd/mt6397-irq.c
> +++ b/drivers/mfd/mt6397-irq.c
> @@ -9,6 +9,7 @@
>  #include <linux/of_irq.h>
>  #include <linux/platform_device.h>
>  #include <linux/regmap.h>
> +#include <linux/suspend.h>
>  #include <linux/mfd/mt6323/core.h>
>  #include <linux/mfd/mt6323/registers.h>
>  #include <linux/mfd/mt6397/core.h>
> @@ -81,7 +82,7 @@ static struct irq_chip mt6397_irq_chip = {
>  static void mt6397_irq_handle_reg(struct mt6397_chip *mt6397, int reg,
>  				  int irqbase)
>  {
> -	unsigned int status;
> +	unsigned int status = 0;

This looks like an unrelated change, no?

>  	int i, irq, ret;
>  
>  	ret = regmap_read(mt6397->regmap, reg, &status);
> @@ -128,6 +129,36 @@ static const struct irq_domain_ops mt6397_irq_domain_ops = {
>  	.map = mt6397_irq_domain_map,
>  };

Other than that.

For my own reference:
  Acked-for-MFD-by: Lee Jones <lee.jones@...aro.org>

-- 
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
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