linux-kernel - Re: [PATCH v1 2/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC

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Message-ID: <20200416131725.51259573@collabora.com>
Date:   Thu, 16 Apr 2020 13:17:25 +0200
From:   Boris Brezillon <boris.brezillon@...labora.com>
To:     "Ramuthevar, Vadivel MuruganX" 
        <vadivel.muruganx.ramuthevar@...ux.intel.com>
Cc:     Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
        anders.roxell@...aro.org, andriy.shevchenko@...el.com,
        arnd@...db.de, brendanhiggins@...gle.com, cheol.yong.kim@...el.com,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-mtd@...ts.infradead.org, masonccyang@...c.com.tw,
        miquel.raynal@...tlin.com, piotrs@...ence.com,
        qi-ming.wu@...el.com, richard@....at, robh+dt@...nel.org,
        tglx@...utronix.de, vigneshr@...com
Subject: Re: [PATCH v1 2/2] mtd: rawnand: Add NAND controller support on
 Intel LGM SoC

On Thu, 16 Apr 2020 18:40:53 +0800
"Ramuthevar, Vadivel MuruganX"
<vadivel.muruganx.ramuthevar@...ux.intel.com> wrote:

> >>> we'll be happy to have one more of the existing driver converted to  
> >>> ->exec_op() ;-).  
> >> I have completely adapted to ->exec_op() hook up to replace the legacy
> >> call-back.  
> > I suspect porting what you've done to the xway driver shouldn't be too
> > complicated.  
> Not ported from xway_nand.c driver , we have developed from the scratch 
> to make it work on
> Intel LGM SoC , it's new x86 ATOM based SoC, IP itself completely 
> different and most of the registers won't match.
> if we port then it would be ugly and also what are the problem may occur 
> we do not know.

Sorry but IMO they look similar enough to try to merge them.