linux-kernel - Re: [PATCH 0/8] Relax sanity checking for mismatched AArch32 EL1

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <e801954c0a14bf9483c084845c18dbfd@codeaurora.org>
Date:   Thu, 16 Apr 2020 15:56:28 +0530
From:   Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
To:     Will Deacon <will@...nel.org>
Cc:     linux-arm-kernel@...ts.infradead.org, kvmarm@...ts.cs.columbia.edu,
        Mark Rutland <mark.rutland@....com>, kernel-team@...roid.com,
        Anshuman Khandual <anshuman.khandual@....com>,
        Marc Zyngier <maz@...nel.org>,
        Suzuki K Poulose <suzuki.poulose@....com>,
        linux-kernel@...r.kernel.org,
        Doug Anderson <dianders@...omium.org>,
        Catalin Marinas <catalin.marinas@....com>
Subject: Re: [PATCH 0/8] Relax sanity checking for mismatched AArch32 EL1

On 2020-04-16 14:09, Sai Prakash Ranjan wrote:
> On 2020-04-15 03:01, Will Deacon wrote:
>> Hi all,
>> 
>> For better or worse, there are SoCs in production where some, but not
>> all of the CPUs, support AArch32 at EL1 and above. Right now, that
>> results in "SANITY CHECK" warnings during boot and an unconditional
>> kernel taint.
>> 
>> This patch series tries to do a bit better: the only time we care 
>> about
>> AArch32 at EL1 is for KVM, so rather than throw our toys out of the
>> pram, we can instead just disable support for 32-bit guests on these
>> systems. In the unlikely scenario of a late CPU hotplug being the 
>> first
>> time we notice that AArch32 is not available, then we fail the hotplug
>> (right now we let the thing come online, which leads to hilarious
>> results for any pre-existing 32-bit guests).
>> 
>> Feedback welcome,
>> 
>> Will
>> 
> 
> Thanks Will, tested this series on QCOM SC7180 and SM8150 SoCs.
> 
> For the entire series,
> 
> Tested-by: saiprakash.ranjan@...eaurora.org
> 

Urgh sorry, it should be

Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>

-Sai
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a 
member
of Code Aurora Forum, hosted by The Linux Foundation