linux-kernel - Re: [PATCH net-next 2/3] net: phy: add Broadcom BCM54140 support

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Message-ID: <8e11a4792db1312b402d37a6a612cf8c@walle.cc>
Date:   Fri, 17 Apr 2020 23:04:21 +0200
From:   Michael Walle <michael@...le.cc>
To:     Vladimir Oltean <olteanv@...il.com>
Cc:     Andrew Lunn <andrew@...n.ch>, linux-hwmon@...r.kernel.org,
        lkml <linux-kernel@...r.kernel.org>,
        netdev <netdev@...r.kernel.org>,
        Jean Delvare <jdelvare@...e.com>,
        Guenter Roeck <linux@...ck-us.net>,
        Florian Fainelli <f.fainelli@...il.com>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Russell King <linux@...linux.org.uk>,
        "David S . Miller" <davem@...emloft.net>
Subject: Re: [PATCH net-next 2/3] net: phy: add Broadcom BCM54140 support

Hi Vladimir,

Am 2020-04-17 22:00, schrieb Vladimir Oltean:
> Hi Michael,
> 
> On Fri, 17 Apr 2020 at 22:52, Michael Walle <michael@...le.cc> wrote:
>> 
>> Hi Andrew,
>> 
>> Am 2020-04-17 21:39, schrieb Andrew Lunn:
>> > On Fri, Apr 17, 2020 at 09:28:57PM +0200, Michael Walle wrote:
>> >
>> >> +static int bcm54140_get_base_addr_and_port(struct phy_device *phydev)
>> >> +{
>> >> +    struct bcm54140_phy_priv *priv = phydev->priv;
>> >> +    struct mii_bus *bus = phydev->mdio.bus;
>> >> +    int addr, min_addr, max_addr;
>> >> +    int step = 1;
>> >> +    u32 phy_id;
>> >> +    int tmp;
>> >> +
>> >> +    min_addr = phydev->mdio.addr;
>> >> +    max_addr = phydev->mdio.addr;
>> >> +    addr = phydev->mdio.addr;
>> >> +
>> >> +    /* We scan forward and backwards and look for PHYs which have the
>> >> +     * same phy_id like we do. Step 1 will scan forward, step 2
>> >> +     * backwards. Once we are finished, we have a min_addr and
>> >> +     * max_addr which resembles the range of PHY addresses of the same
>> >> +     * type of PHY. There is one caveat; there may be many PHYs of
>> >> +     * the same type, but we know that each PHY takes exactly 4
>> >> +     * consecutive addresses. Therefore we can deduce our offset
>> >> +     * to the base address of this quad PHY.
>> >> +     */
>> >
>> > Hi Michael
>> >
>> > How much flexibility is there in setting the base address using
>> > strapping etc? Is it limited to a multiple of 4?
>> 
>> You can just set the base address to any address. Then the following
>> addresses are used:
>>    base, base + 1, base + 2, base + 3, (base + 4)*
>> 
>> It is not specified what happens if you set the base so that it would
>> overflow. I guess that is a invalid strapping.
>> 
>> * (base + 4) is some kind of special PHY address which maps some kind
>> of moving window to a QSGMII address space. It is enabled by default,
>> could be disabled in software, but it doesn't share the same PHY id
>> for which this scans.
>> 
>> So yes, if you look at the addresses and the phy ids, there are
>> always 4 of this.
>> 
>> -michael
> 
> What does the reading of the global register give you, when accessed
> through the master PHY ID vs any other PHY ID? Could you use that as
> an indication of this being the correct PHY ID, and scan only to the
> left?

That was my first try, I thought it reads zero if you access a global
register by a PHY address which is not the base one. So I've looked
at registers which have at least one read-only 1 bit in it and scanned
only backwards. Well it turns out, my assumption was wrong and it
returns an old value of a successful read/write before. So it can just
return anything. And yes, its likely that you could read another
register and then probe the global register. But in the end I preferred
scanning the (known) phy id registers over strange hacks. Broadcom
could have just added a per-port register to actually read the base
address, but well.. ;)

-michael