linux-kernel - Re: [RFC PATCH 2/4] net: phy: Add support for AC200 EPHY

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Message-ID: <20200417170138.GD785713@lunn.ch>
Date:   Fri, 17 Apr 2020 19:01:38 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Jernej Škrabec <jernej.skrabec@...l.net>
Cc:     robh+dt@...nel.org, f.fainelli@...il.com,
        Heiner Kallweit <hkallweit1@...il.com>,
        devicetree@...r.kernel.org, netdev@...r.kernel.org,
        linux@...linux.org.uk, mripard@...nel.org,
        linux-kernel@...r.kernel.org, wens@...e.org, lee.jones@...aro.org,
        davem@...emloft.net, linux-arm-kernel@...ts.infradead.org
Subject: Re: [RFC PATCH 2/4] net: phy: Add support for AC200 EPHY

> > You could use PHY_ID_MATCH_MODEL() here.
> 
> Hm... This doesn't work with dynamically allocated memory, right?

I would suggest we get the right structure first, then figure out
details like this.

Depending on when the device will respond to MDIO, we might be able to
make this a normal PHY driver. It then probes in the normal way, and
all the horrible dependencies you talked about, module loading order,
etc all go away.

There were 3 things you talked about to make the PHY usable:

1) Clock
2) Reset
3) Must be enabled and configured through I2C

We already have the concept of a PHY device having a reset controller
as a property. e.g. Documentation/devicetree/bindings/net/ethernet-phy.yaml

resets = <&rst 8>;

So if the MFD exports a reset controller, we can control that from the
PHY core. If the MFD has not probed yet, the reset core code will
return EPROBE_DEFFER, and the PHY probe will get differed until late.
That solves a lot of probe order issues.

The clock can be handled in two different ways, depending on if the
clock needs to be ticking to read the PHY ID registers. If it does
need to be ticking, we add support for a clks property in just the
same way we have support for the reset property. The PHY core will
clk_enable_prepare() the clock before probing the PHY. If the clock is
not needed for probing, the PHY driver can enable the clock as needed.

The last part, Must be enabled and configured through I2C, we need to
look at the details. It could be the reset controller also enabled the
PHY. If that is enough that the PHY then probes, the PHY driver can
then configure the PHY as needed via i2c.

     Andrew