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Message-ID: <20200420121055.GF20696@hirez.programming.kicks-ass.net>
Date: Mon, 20 Apr 2020 14:10:55 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: Zhenyu Ye <yezhenyu2@...wei.com>
Cc: mark.rutland@....com, will@...nel.org, catalin.marinas@....com,
aneesh.kumar@...ux.ibm.com, akpm@...ux-foundation.org,
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maz@...nel.org, suzuki.poulose@....com, tglx@...utronix.de,
yuzhao@...gle.com, Dave.Martin@....com, steven.price@....com,
broonie@...nel.org, guohanjun@...wei.com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-arch@...r.kernel.org, linux-mm@...ck.org, arm@...nel.org,
xiexiangyou@...wei.com, prime.zeng@...ilicon.com,
zhangshaokun@...ilicon.com, kuhn.chenqun@...wei.com
Subject: Re: [PATCH v1 6/6] arm64: tlb: Set the TTL field in flush_tlb_range
On Fri, Apr 03, 2020 at 05:00:48PM +0800, Zhenyu Ye wrote:
> This patch uses the cleared_* in struct mmu_gather to set the
> TTL field in flush_tlb_range().
>
> Signed-off-by: Zhenyu Ye <yezhenyu2@...wei.com>
> ---
> arch/arm64/include/asm/tlb.h | 26 +++++++++++++++++++++++++-
> arch/arm64/include/asm/tlbflush.h | 14 ++++++++------
> 2 files changed, 33 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm64/include/asm/tlb.h b/arch/arm64/include/asm/tlb.h
> index b76df828e6b7..d5ab72eccff4 100644
> --- a/arch/arm64/include/asm/tlb.h
> +++ b/arch/arm64/include/asm/tlb.h
> @@ -21,11 +21,34 @@ static void tlb_flush(struct mmu_gather *tlb);
>
> #include <asm-generic/tlb.h>
>
> +/*
> + * get the tlbi levels in arm64. Default value is 0 if more than one
> + * of cleared_* is set or neither is set.
> + * Arm64 doesn't support p4ds now.
> + */
> +static inline int tlb_get_level(struct mmu_gather *tlb)
> +{
> + int sum = tlb->cleared_ptes + tlb->cleared_pmds +
> + tlb->cleared_puds + tlb->cleared_p4ds;
> +
> + if (sum != 1)
> + return 0;
> + else if (tlb->cleared_ptes)
> + return 3;
> + else if (tlb->cleared_pmds)
> + return 2;
> + else if (tlb->cleared_puds)
> + return 1;
> +
> + return 0;
> +}
That's some mighty wonky code. Please look at the generated asm.
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