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Message-Id: <20200420130021.3841-2-peron.clem@gmail.com>
Date: Mon, 20 Apr 2020 15:00:13 +0200
From: Clément Péron <peron.clem@...il.com>
To: Maxime Ripard <mripard@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
Rob Herring <robh+dt@...nel.org>
Cc: linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-sunxi <linux-sunxi@...glegroups.com>,
Yangtao Li <tiny.windzz@...il.com>,
Clément Péron <peron.clem@...il.com>
Subject: [PATCH v5 1/9] arm64: dts: allwinner: h6: Add clock to CPU cores
From: Yangtao Li <tiny.windzz@...il.com>
The ARM CPU cores are fed by the CPU clock from the CCU. Add a
reference to the clock for each CPU core, along with the clock
transition latency.
Signed-off-by: Yangtao Li <tiny.windzz@...il.com>
Signed-off-by: Clément Péron <peron.clem@...il.com>
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index a5ee68388bd3..370e77b86fe1 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -25,6 +25,8 @@
device_type = "cpu";
reg = <0>;
enable-method = "psci";
+ clocks = <&ccu CLK_CPUX>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
};
cpu1: cpu@1 {
@@ -32,6 +34,8 @@
device_type = "cpu";
reg = <1>;
enable-method = "psci";
+ clocks = <&ccu CLK_CPUX>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
};
cpu2: cpu@2 {
@@ -39,6 +43,8 @@
device_type = "cpu";
reg = <2>;
enable-method = "psci";
+ clocks = <&ccu CLK_CPUX>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
};
cpu3: cpu@3 {
@@ -46,6 +52,8 @@
device_type = "cpu";
reg = <3>;
enable-method = "psci";
+ clocks = <&ccu CLK_CPUX>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
};
};
--
2.20.1
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