linux-kernel - [tip: x86/mm] x86/mm: Add a x86_has_pat

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Message-ID: <158738942857.28353.5477632889684051929.tip-bot2@tip-bot2>
Date:   Mon, 20 Apr 2020 13:30:28 -0000
From:   "tip-bot2 for Christoph Hellwig" <tip-bot2@...utronix.de>
To:     linux-tip-commits@...r.kernel.org
Cc:     Christoph Hellwig <hch@....de>, Borislav Petkov <bp@...e.de>,
        "Peter Zijlstra (Intel)" <peterz@...radead.org>,
        x86 <x86@...nel.org>, LKML <linux-kernel@...r.kernel.org>
Subject: [tip: x86/mm] x86/mm: Add a x86_has_pat_wp() helper

The following commit has been merged into the x86/mm branch of tip:

Commit-ID:     1f6f655e01adebf5bd5e6c3da2e843c104ded051
Gitweb:        https://git.kernel.org/tip/1f6f655e01adebf5bd5e6c3da2e843c104ded051
Author:        Christoph Hellwig <hch@....de>
AuthorDate:    Wed, 08 Apr 2020 17:27:42 +02:00
Committer:     Borislav Petkov <bp@...e.de>
CommitterDate: Mon, 20 Apr 2020 12:39:11 +02:00

x86/mm: Add a x86_has_pat_wp() helper

Abstract the ioremap code away from the caching mode internals.

Signed-off-by: Christoph Hellwig <hch@....de>
Signed-off-by: Borislav Petkov <bp@...e.de>
Acked-by: Peter Zijlstra (Intel) <peterz@...radead.org>
Link: https://lkml.kernel.org/r/20200408152745.1565832-2-hch@lst.de
---
 arch/x86/include/asm/memtype.h | 2 ++
 arch/x86/mm/init.c             | 6 ++++++
 arch/x86/mm/ioremap.c          | 8 ++------
 3 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/arch/x86/include/asm/memtype.h b/arch/x86/include/asm/memtype.h
index 9c2447b..1e4e99b 100644
--- a/arch/x86/include/asm/memtype.h
+++ b/arch/x86/include/asm/memtype.h
@@ -24,4 +24,6 @@ extern void memtype_free_io(resource_size_t start, resource_size_t end);
 
 extern bool pat_pfn_immune_to_uc_mtrr(unsigned long pfn);
 
+bool x86_has_pat_wp(void);
+
 #endif /* _ASM_X86_MEMTYPE_H */
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index 1bba16c..6005f83 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -71,6 +71,12 @@ uint8_t __pte2cachemode_tbl[8] = {
 };
 EXPORT_SYMBOL(__pte2cachemode_tbl);
 
+/* Check that the write-protect PAT entry is set for write-protect */
+bool x86_has_pat_wp(void)
+{
+	return __pte2cachemode_tbl[_PAGE_CACHE_MODE_WP] == _PAGE_CACHE_MODE_WP;
+}
+
 static unsigned long __initdata pgt_buf_start;
 static unsigned long __initdata pgt_buf_end;
 static unsigned long __initdata pgt_buf_top;
diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c
index 18c637c..41536f5 100644
--- a/arch/x86/mm/ioremap.c
+++ b/arch/x86/mm/ioremap.c
@@ -778,10 +778,8 @@ void __init *early_memremap_encrypted(resource_size_t phys_addr,
 void __init *early_memremap_encrypted_wp(resource_size_t phys_addr,
 					 unsigned long size)
 {
-	/* Be sure the write-protect PAT entry is set for write-protect */
-	if (__pte2cachemode_tbl[_PAGE_CACHE_MODE_WP] != _PAGE_CACHE_MODE_WP)
+	if (!x86_has_pat_wp())
 		return NULL;
-
 	return early_memremap_prot(phys_addr, size, __PAGE_KERNEL_ENC_WP);
 }
 
@@ -799,10 +797,8 @@ void __init *early_memremap_decrypted(resource_size_t phys_addr,
 void __init *early_memremap_decrypted_wp(resource_size_t phys_addr,
 					 unsigned long size)
 {
-	/* Be sure the write-protect PAT entry is set for write-protect */
-	if (__pte2cachemode_tbl[_PAGE_CACHE_MODE_WP] != _PAGE_CACHE_MODE_WP)
+	if (!x86_has_pat_wp())
 		return NULL;
-
 	return early_memremap_prot(phys_addr, size, __PAGE_KERNEL_NOENC_WP);
 }
 #endif	/* CONFIG_AMD_MEM_ENCRYPT */