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Message-ID: <CAGOxZ52mQ=H5DR7nWJY3RMBuJMr9SXERukJs1UK_Wr1XHP9TZg@mail.gmail.com>
Date: Tue, 21 Apr 2020 22:26:21 +0530
From: Alim Akhtar <alim.akhtar@...il.com>
To: Alim Akhtar <alim.akhtar@...sung.com>
Cc: robh <robh@...nel.org>, devicetree@...r.kernel.org,
linux-scsi@...r.kernel.org, Krzysztof Kozlowski <krzk@...nel.org>,
Avri Altman <avri.altman@....com>,
"Martin K. Petersen" <martin.petersen@...cle.com>,
Kiwoong Kim <kwmad.kim@...sung.com>,
Stanley Chu <stanley.chu@...iatek.com>,
Can Guo <cang@...eaurora.org>,
linux-samsung-soc@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v6 08/10] dt-bindings: ufs: Add DT binding documentation
for ufs
Hi Rob
Request to comment on this dt-bindings documentation.
Thanks
On Fri, Apr 17, 2020 at 11:41 PM Alim Akhtar <alim.akhtar@...sung.com> wrote:
>
> This patch adds DT binding for samsung ufs hci
>
> Signed-off-by: Alim Akhtar <alim.akhtar@...sung.com>
> ---
> .../bindings/ufs/samsung,exynos-ufs.yaml | 93 +++++++++++++++++++
> 1 file changed, 93 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
>
> diff --git a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
> new file mode 100644
> index 000000000000..954338b7f37d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
> @@ -0,0 +1,93 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/ufs/samsung,exynos-ufs.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Samsung SoC series UFS host controller Device Tree Bindings
> +
> +maintainers:
> + - Alim Akhtar <alim.akhtar@...sung.com>
> +
> +description: |
> + Each Samsung UFS host controller instance should have its own node.
> + This binding define Samsung specific binding other then what is used
> + in the common ufshcd bindings
> + [1] Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
> +
> +properties:
> +
> + compatible:
> + enum:
> + - samsung,exynos7-ufs
> +
> + reg:
> + items:
> + - description: HCI register
> + - description: vendor specific register
> + - description: unipro register
> + - description: UFS protector register
> +
> + reg-names:
> + items:
> + - const: hci
> + - const: vs_hci
> + - const: unipro
> + - const: ufsp
> +
> + clocks:
> + maxItems: 2
> + items:
> + - description: ufs link core clock
> + - description: unipro main clock
> +
> + clock-names:
> + maxItems: 2
> + items:
> + - const: core_clk
> + - const: sclk_unipro_main
> +
> + interrupts:
> + items:
> + - description: interrupt signal for various ufshc status
> +
> + phys:
> + maxItems: 1
> + description:
> + phandle of the ufs phy node
> +
> + phy-names:
> + const: ufs-phy
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - phys
> + - phy-names
> + - clocks
> + - clock-names
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/clock/exynos7-clk.h>
> +
> + ufs: ufs@...70000 {
> + compatible = "samsung,exynos7-ufs";
> + reg = <0x15570000 0x100>,
> + <0x15570100 0x100>,
> + <0x15571000 0x200>,
> + <0x15572000 0x300>;
> + reg-names = "hci", "vs_hci", "unipro", "ufsp";
> + interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock_fsys1 ACLK_UFS20_LINK>,
> + <&clock_fsys1 SCLK_UFSUNIPRO20_USER>;
> + clock-names = "core_clk", "sclk_unipro_main";
> + pinctrl-names = "default";
> + pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
> + pclk-freq-avail-range = <70000000 133000000>;
> + phys = <&ufs_phy>;
> + phy-names = "ufs-phy";
> + };
> +...
> --
> 2.17.1
>
--
Regards,
Alim
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