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Message-ID: <20200421141543.GU37466@atomide.com>
Date: Tue, 21 Apr 2020 07:15:43 -0700
From: Tony Lindgren <tony@...mide.com>
To: Maxime Ripard <maxime@...no.tech>
Cc: Philipp Rossak <embed3d@...il.com>,
"H. Nikolaus Schaller" <hns@...delico.com>,
David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
BenoƮt Cousson <bcousson@...libre.com>,
Paul Cercueil <paul@...pouillou.net>,
Ralf Baechle <ralf@...ux-mips.org>,
Paul Burton <paulburton@...nel.org>,
James Hogan <jhogan@...nel.org>, Kukjin Kim <kgene@...nel.org>,
Krzysztof Kozlowski <krzk@...nel.org>,
Chen-Yu Tsai <wens@...e.org>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
"open list:DRM PANEL DRIVERS" <dri-devel@...ts.freedesktop.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
linux-omap <linux-omap@...r.kernel.org>,
OpenPVRSGX Linux Driver Group <openpvrsgx-devgroup@...ux.org>,
Discussions about the Letux Kernel
<letux-kernel@...nphoenux.org>, kernel@...a-handheld.com,
linux-mips@...r.kernel.org,
arm-soc <linux-arm-kernel@...ts.infradead.org>,
linux-samsung-soc@...r.kernel.org
Subject: Re: [PATCH v6 00/12] ARM/MIPS: DTS: add child nodes describing the
PVRSGX GPU present in some OMAP SoC and JZ4780 (and many more)
* Maxime Ripard <maxime@...no.tech> [200421 11:22]:
> On Tue, Apr 21, 2020 at 11:57:33AM +0200, Philipp Rossak wrote:
> > I had a look on genpd and I'm not really sure if that fits.
> >
> > It is basically some bit that verify that the clocks should be enabled or
> > disabled.
>
> No, it can do much more than that. It's a framework to control the SoCs power
> domains, so clocks might be a part of it, but most of the time it's going to be
> about powering up a particular device.
Note that on omaps there are actually SoC module specific registers.
And there can be multiple devices within a single target module on
omaps. So the extra dts node and device is justified there.
For other SoCs, the SGX clocks are probably best handled directly
in pvr-drv.c PM runtime functions unless a custom hardware wrapper
with SoC specific registers exists.
Regards,
Tony
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