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Message-ID: <CAFBinCAGP7ZE-OksaE=6E54r2e0VJk2wMTEwKU65qAoR4dQvxw@mail.gmail.com>
Date: Wed, 22 Apr 2020 23:12:50 +0200
From: Martin Blumenstingl <martin.blumenstingl@...glemail.com>
To: Neil Armstrong <narmstrong@...libre.com>
Cc: dri-devel@...ts.freedesktop.org, linux-amlogic@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH] drm/meson: add mode selection limits against specific SoC revisions
Hi Neil,
On Tue, Apr 21, 2020 at 3:44 PM Neil Armstrong <narmstrong@...libre.com> wrote:
[...]
> diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c
> index e8c94915a4fc..dc3d5122475a 100644
> --- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
> +++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
> @@ -695,6 +695,13 @@ dw_hdmi_mode_valid(struct drm_connector *connector,
> dev_dbg(connector->dev->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n",
> __func__, phy_freq, vclk_freq, venc_freq, hdmi_freq);
>
> + /* Check against soc revision/package limits */
> + if (priv->limits) {
> + if (priv->limits->max_hdmi_phy_freq &&
> + phy_freq > priv->limits->max_hdmi_phy_freq)
> + return MODE_CLOCK_HIGH;
> + }
I think that this will also be useful for the 32-bit SoCs as well.
is there a chance you can move it to meson_vclk_vic_supported_freq
(called right below), where all the existing frequency limit checks
are already?
Thank you!
Martin
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