lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 23 Apr 2020 13:54:32 +0800
From:   Huacai Chen <chenhc@...ote.com>
To:     Jiaxun Yang <jiaxun.yang@...goat.com>
Cc:     "open list:MIPS" <linux-mips@...r.kernel.org>,
        Marc Zyngier <maz@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Jason Cooper <jason@...edaemon.net>,
        Rob Herring <robh+dt@...nel.org>,
        LKML <linux-kernel@...r.kernel.org>, devicetree@...r.kernel.org
Subject: Re: [PATCH 4/6] dt-bindings: interrupt-controller: Add Loongson PCH PIC

Hi, Jiaxun,

On Wed, Apr 22, 2020 at 10:27 PM Jiaxun Yang <jiaxun.yang@...goat.com> wrote:
>
> Add binding for Loongson PCH PIC Controller.
>
> Signed-off-by: Jiaxun Yang <jiaxun.yang@...goat.com>
> ---
>  .../loongson,pch-pic.yaml                     | 55 +++++++++++++++++++
>  1 file changed, 55 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml
> new file mode 100644
> index 000000000000..afc0c924e477
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml
> @@ -0,0 +1,55 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/interrupt-controller/loongson,pch-pic.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Loongson PCH PIC Controller
> +
> +maintainers:
> +  - Jiaxun Yang <jiaxun.yang@...goat.com>
> +
> +allOf:
> +  - $ref: /schemas/interrupt-controller.yaml#
> +
> +description: |
> +  This interrupt controller is found in the Loongson-7A family of PCH for
Please use "Loongson's LS7A family" here.

> +  transforming interrupts from on-chip devices into HyperTransport vectorized
> +  interrupts.
> +
> +properties:
> +  compatible:
> +    const: loongson,pch-pic-1.0
> +
> +  reg:
> +    maxItems: 1
> +
> +  loongson,pic-base-vec:
> +    $ref: '/schemas/types.yaml#/definitions/uint32'
> +    description: |
> +      u32 value of the base of parent HyperTransport vector allocated
> +      to PCH PIC.
> +
> +  interrupt-controller: true
> +
> +  '#interrupt-cells':
> +    const: 2
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupt-controller
> +  - '#interrupt-cells'
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/irq.h>
> +    pic: interrupt-controller@...00000 {
> +      compatible = "loongson,pch-pic-1.0";
> +      reg = <0x10000000 0x400>;
> +      interrupt-controller;
> +      #interrupt-cells = <2>;
> +      loongson,pic-base-vec = <64>;
> +      interrupt-parent = <&htvec>;
> +    };
> +...
> --
> 2.26.0.rc2
>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ