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Date:   Mon, 27 Apr 2020 20:30:01 +0200
From:   Boris Brezillon <boris.brezillon@...labora.com>
To:     Miquel Raynal <miquel.raynal@...tlin.com>
Cc:     "Ramuthevar,Vadivel MuruganX" 
        <vadivel.muruganx.ramuthevar@...ux.intel.com>,
        linux-kernel@...r.kernel.org, linux-mtd@...ts.infradead.org,
        devicetree@...r.kernel.org, richard@....at, vigneshr@...com,
        arnd@...db.de, brendanhiggins@...gle.com, tglx@...utronix.de,
        anders.roxell@...aro.org, masonccyang@...c.com.tw,
        piotrs@...ence.com, robh+dt@...nel.org, linux-mips@...r.kernel.org,
        hauke.mehrtens@...el.com, andriy.shevchenko@...el.com,
        qi-ming.wu@...el.com, cheol.yong.kim@...el.com
Subject: Re: [PATCH v2 2/2] mtd: rawnand: Add NAND controller support on
 Intel LGM SoC

On Mon, 27 Apr 2020 17:38:46 +0200
Miquel Raynal <miquel.raynal@...tlin.com> wrote:

> Hi Boris,
> 
> Boris Brezillon <boris.brezillon@...labora.com> wrote on Sat, 18 Apr
> 2020 10:55:33 +0200:
> 
> > On Fri, 17 Apr 2020 16:21:47 +0800
> > "Ramuthevar,Vadivel MuruganX"
> > <vadivel.muruganx.ramuthevar@...ux.intel.com> wrote:
> >   
> > > From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@...ux.intel.com>
> > > 
> > > This patch adds the new IP of Nand Flash Controller(NFC) support
> > > on Intel's Lightning Mountain(LGM) SoC.
> > > 
> > > DMA is used for burst data transfer operation, also DMA HW supports
> > > aligned 32bit memory address and aligned data access by default.
> > > DMA burst of 8 supported. Data register used to support the read/write
> > > operation from/to device.
> > > 
> > > NAND controller driver implements ->exec_op() to replace legacy hooks,
> > > these specific call-back method to execute NAND operations.
> > > 
> > > Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@...ux.intel.com>
> > > ---
> > >  drivers/mtd/nand/raw/Kconfig          |   7 +
> > >  drivers/mtd/nand/raw/Makefile         |   1 +
> > >  drivers/mtd/nand/raw/intel_lgm_nand.c | 740 ++++++++++++++++++++++++++++++++++    
> > 
> > I wonder if we shouldn't name the driver infineon-nand-controller.c
> > since the original design comes from Infineon IIUC. intel_lgm_nand.c is
> > definitely misleading, as we also have a nand_intel.c file which is for
> > Intel NAND chips (not NAND controllers). If we keep intel in the name,
> > let's at least add a "-controller" suffix to make it clear.
> > 
> > Side note for Miquel: I guess we would also benefit from having a clear
> > core vs controller-drivers split as recently done for spi-nor (a
> > controller subdir has been created).  
> 
> I would even like a core vs controller drivers vs nand chips drivers.
> 
> Macronix for instance has a NAND controller driver and a NAND chip
> driver, that's why, even if it is a bit long, I enforce the -nfc or
> -nand-controller (my favorite) suffix now.

Maybe we can make it happen. I mean, moving drivers to a sub-dir is
pretty easy ;).

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