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Message-ID: <CAP-HsdQOyWrz+Y7gR9jrNjX09NCYB1EWK7swMQDZ-v-VJLGRMw@mail.gmail.com>
Date:   Mon, 27 Apr 2020 21:59:59 +0300
From:   Adrian Pop <pop.adrian61@...il.com>
To:     Lee Jones <lee.jones@...aro.org>
Cc:     Alexandre Torgue <alexandre.torgue@...com>,
        Maxime Coquelin <mcoquelin.stm32@...il.com>,
        Rob Herring <robh+dt@...nel.org>, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-stm32@...md-mailman.stormreply.com,
        devicetree@...r.kernel.org
Subject: Re: [PATCH 1/2] arm: dt-bindings: mfd: stm32f-rcc: Add missing DSI clock

On Mon, Apr 27, 2020 at 9:49 AM Lee Jones <lee.jones@...aro.org> wrote:
>
> On Fri, 24 Apr 2020, Adrian Pop wrote:
>
> > Add missing clock.
> >
> > Signed-off-by: Adrian Pop <pop.adrian61@...il.com>
> > ---
> >  include/dt-bindings/mfd/stm32f7-rcc.h | 1 +
> >  1 file changed, 1 insertion(+)
>
> I assume patch 2 depends on this?

Yes, second patch depends on this.

>
> If so, where is it?  Why isn't it in my inbox?
>

Here it is:

STM32f769-disco features a 4" MIPI DSI display: add support for it.

Signed-off-by: Adrian Pop <pop.adrian61@...il.com>
---
 arch/arm/boot/dts/stm32f746.dtsi      | 34 ++++++++++++++++++
 arch/arm/boot/dts/stm32f769-disco.dts | 50 +++++++++++++++++++++++++++
 2 files changed, 84 insertions(+)

diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
index 93c063796780..202bb6edc9f1 100644
--- a/arch/arm/boot/dts/stm32f746.dtsi
+++ b/arch/arm/boot/dts/stm32f746.dtsi
@@ -48,6 +48,19 @@ / {
        #address-cells = <1>;
        #size-cells = <1>;

+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               linux,dma {
+                       compatible = "shared-dma-pool";
+                       linux,dma-default;
+                       no-map;
+                       size = <0x10F000>;
+               };
+       };
+
        clocks {
                clk_hse: clk-hse {
                        #clock-cells = <0>;
@@ -75,6 +88,27 @@ clk_i2s_ckin: clk-i2s-ckin {
        };

        soc {
+               ltdc: display-controller@...16800 {
+                       compatible = "st,stm32-ltdc";
+                       reg = <0x40016800 0x200>;
+                       interrupts = <88>, <89>;
+                       resets = <&rcc STM32F7_APB2_RESET(LTDC)>;
+                       clocks = <&rcc 1 CLK_LCD>;
+                       clock-names = "lcd";
+                       status = "disabled";
+               };
+
+               dsi: dsi@...16c00 {
+                       compatible = "st,stm32-dsi";
+                       reg = <0x40016c00 0x800>;
+                       interrupts = <98>;
+                       clocks = <&rcc 1 CLK_F769_DSI>, <&clk_hse>;
+                       clock-names = "pclk", "ref";
+                       resets = <&rcc STM32F7_APB2_RESET(DSI)>;
+                       reset-names = "apb";
+                       status = "disabled";
+               };
+
                timer2: timer@...00000 {
                        compatible = "st,stm32-timer";
                        reg = <0x40000000 0x400>;
diff --git a/arch/arm/boot/dts/stm32f769-disco.dts
b/arch/arm/boot/dts/stm32f769-disco.dts
index 1626e00bb2cb..30ebbc193e82 100644
--- a/arch/arm/boot/dts/stm32f769-disco.dts
+++ b/arch/arm/boot/dts/stm32f769-disco.dts
@@ -153,3 +153,53 @@ &usbotg_hs {
        pinctrl-names = "default";
        status = "okay";
 };
+
+&dsi {
+       #address-cells = <1>;
+       #size-cells = <0>;
+       status = "okay";
+
+       ports {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               port@0 {
+                       reg = <0>;
+                       dsi_in: endpoint {
+                               remote-endpoint = <&ltdc_out_dsi>;
+                       };
+               };
+
+               port@1 {
+                       reg = <1>;
+                       dsi_out: endpoint {
+                               remote-endpoint = <&dsi_in_panel>;
+                       };
+               };
+
+       };
+
+       panel: panel {
+               compatible = "orisetech,otm8009a";
+               reg = <0>; /* dsi virtual channel (0..3) */
+               reset-gpios = <&gpioj 15 GPIO_ACTIVE_LOW>;
+               status = "okay";
+
+               port {
+                       dsi_in_panel: endpoint {
+                               remote-endpoint = <&dsi_out>;
+                       };
+               };
+       };
+};
+
+&ltdc {
+       dma-ranges;
+       status = "okay";
+
+       port {
+               ltdc_out_dsi: endpoint {
+                       remote-endpoint = <&dsi_in>;
+               };
+       };
+};
--

> > diff --git a/include/dt-bindings/mfd/stm32f7-rcc.h b/include/dt-bindings/mfd/stm32f7-rcc.h
> > index a90f3613c584..ba5cb7456ee4 100644
> > --- a/include/dt-bindings/mfd/stm32f7-rcc.h
> > +++ b/include/dt-bindings/mfd/stm32f7-rcc.h
> > @@ -107,6 +107,7 @@
> >  #define STM32F7_RCC_APB2_SAI1                22
> >  #define STM32F7_RCC_APB2_SAI2                23
> >  #define STM32F7_RCC_APB2_LTDC                26
> > +#define STM32F7_RCC_APB2_DSI         27
> >
> >  #define STM32F7_APB2_RESET(bit)      (STM32F7_RCC_APB2_##bit + (0x24 * 8))
> >  #define STM32F7_APB2_CLOCK(bit)      (STM32F7_RCC_APB2_##bit + 0xA0)
>
> --
> Lee Jones [李琼斯]
> Linaro Services Technical Lead
> Linaro.org │ Open source software for ARM SoCs
> Follow Linaro: Facebook | Twitter | Blog

On Mon, Apr 27, 2020 at 9:49 AM Lee Jones <lee.jones@...aro.org> wrote:
>
> On Fri, 24 Apr 2020, Adrian Pop wrote:
>
> > Add missing clock.
> >
> > Signed-off-by: Adrian Pop <pop.adrian61@...il.com>
> > ---
> >  include/dt-bindings/mfd/stm32f7-rcc.h | 1 +
> >  1 file changed, 1 insertion(+)
>
> I assume patch 2 depends on this?
>
> If so, where is it?  Why isn't it in my inbox?
>
> > diff --git a/include/dt-bindings/mfd/stm32f7-rcc.h b/include/dt-bindings/mfd/stm32f7-rcc.h
> > index a90f3613c584..ba5cb7456ee4 100644
> > --- a/include/dt-bindings/mfd/stm32f7-rcc.h
> > +++ b/include/dt-bindings/mfd/stm32f7-rcc.h
> > @@ -107,6 +107,7 @@
> >  #define STM32F7_RCC_APB2_SAI1                22
> >  #define STM32F7_RCC_APB2_SAI2                23
> >  #define STM32F7_RCC_APB2_LTDC                26
> > +#define STM32F7_RCC_APB2_DSI         27
> >
> >  #define STM32F7_APB2_RESET(bit)      (STM32F7_RCC_APB2_##bit + (0x24 * 8))
> >  #define STM32F7_APB2_CLOCK(bit)      (STM32F7_RCC_APB2_##bit + 0xA0)
>
> --
> Lee Jones [李琼斯]
> Linaro Services Technical Lead
> Linaro.org │ Open source software for ARM SoCs
> Follow Linaro: Facebook | Twitter | Blog

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