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Message-ID: <20200427215209.GP1250287@lunn.ch>
Date:   Mon, 27 Apr 2020 23:52:09 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Roelof Berg <rberg@...g-solutions.de>
Cc:     "David S. Miller" <davem@...emloft.net>,
        Bryan Whitehead <bryan.whitehead@...rochip.com>,
        Microchip Linux Driver Support <UNGLinuxDriver@...rochip.com>,
        Russell King <linux@...linux.org.uk>,
        Thomas Gleixner <tglx@...utronix.de>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        netdev@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] lan743x: Added fixed_phy support

On Mon, Apr 27, 2020 at 11:37:07PM +0200, Roelof Berg wrote:
> Hello Andrew,
> 
> thanks for working together on this. Our target system is an embedded linux device for vehicles, that has all three components as single chips on one PCB: The MCU, the lan743x MAC and a KSZ9893 switch.

What is the MCU? ARM?

> Four options:
> a) We offer this kernel configuration and the next embedded system designer can use phyless MII mode.
> b) We change this to a runtime configuration that somehow auto-detects that phyless MII mode is desired.
>     (Then the EEPROM/OTP needs to provide baud rate, MII mode and duplex mode by user-register access).
> c) We move the configuration of the phyless mode to somewhere like dev-fs
> d) We avoid compiled fixed_phy and use a newer method. Like device-tree configuration of fixed_phy (is it working allready ?) or phylink as you originally suggested. Unfortunately I have no test-hardware here that uses a phy.
> e) We leave this one away from the kernel if it is unlikely that other embedded systems would use lan8431 in direct (phyless) MII mode as well. Microchip (on cc) could know more about this likelihood.

If you are using ARM, device tree is the way to go. In systems like
this, you know exactly which PCIe bus the lan743x will be hanging
off. So you can add a DT node for it. It is not done very often, but
look at arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi. That board has an
intel i210 on its PCIe bus, and we need a phandle for it. But you can
add any properties you want. For what you are doing, you should be
looking at:

Documentation/devicetree/bindings/net/ethernet-controller.yaml:

phy-mode and fixed-link.

	  Andrew

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