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Message-ID: <c199f6d7-156a-d1c9-fa59-7cbe92c37c96@huawei.com>
Date:   Mon, 27 Apr 2020 09:09:46 +0100
From:   John Garry <john.garry@...wei.com>
To:     Joakim Zhang <qiangqing.zhang@....com>,
        "peterz@...radead.org" <peterz@...radead.org>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "acme@...nel.org" <acme@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "alexander.shishkin@...ux.intel.com" 
        <alexander.shishkin@...ux.intel.com>,
        "jolsa@...hat.com" <jolsa@...hat.com>,
        "namhyung@...nel.org" <namhyung@...nel.org>,
        "will@...nel.org" <will@...nel.org>
CC:     "irogers@...gle.com" <irogers@...gle.com>,
        "ak@...ux.intel.com" <ak@...ux.intel.com>,
        Linuxarm <linuxarm@...wei.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Zhangshaokun <zhangshaokun@...ilicon.com>,
        "robin.murphy@....com" <robin.murphy@....com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [RFC PATCH v2 09/13] perf vendor events: Add JSON metrics for
 imx8mm DDR Perf

On 21/04/2020 13:28, John Garry wrote:
>> cles(event=0x00), read-cycles(event=0x2a), write-cycles(event=0x2b), 
>> read(event=0x35), write(event=0x38), all these events listed in file 
>> (tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/ddrc.json) are 
>> compatible for all i.MX8 DDR Perf, only AXI events are various from 
>> each SoC. These events tested okay for MX8MM and MX8QM.
>>
>> Same situation, metrics listed in file 
>> (tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/metrics.json) 
>> is also compatible for all i.MX8 DDR Perf, since metric expression 
>> only contains read-cycles(event=0x2a) and write-cycles(event=0x2b).
>>
>> Generally speaking, now pmu events and metrics on your branch should 
>> support both MX8MM and MX8QM without any change, as long as they 
>> export "i.mx8mm" identifier.
> 
> Right, but MX8QM should export "i.mx8qm" identifier for upstream 
> eventually.
> 
>>
>> As I mentioned before, pmu events tested okay for MX8MM and MX8QM. 
>> Metric also tested okay for MX8MM.
>> For MX8QM which has two HW PMU(ddr0/ddr1), metric can work, but it 
>> would add metric twice which I think if it is possible to improve it 
>> in your serials.
>>
>> I guess the root cause is that "imx8_ddr.read_cycles" contains two HW 
>> PMU events (imx8_ddr0/read-cycles/ and imx8_ddr1/read-cycles/) and 
>> metricgroup can't handle it at present.
> 
> It should be ok, but I'll check it.
> 

ok, I think I see the issue here. We add a metric per PMU erroneously. 
We don't see an issue for printing metrics, as the code does not error 
when adding clones when printing (which we do).

I'll try to fix this week.

Thanks,
John

>>
>> 8QM:
>> root@...8qmmek:~# ./perf stat -v -a -I 1000 -M imx8mm_ddr_read.all
>> Using CPUID 0x00000000410fd030
>> metric expr imx8_ddr.read_cycles * 4 * 4 for imx8mm_ddr_read.all
>> found event imx8_ddr.read_cycles
>> metric expr imx8_ddr.read_cycles * 4 * 4 for imx8mm_ddr_read.all
>> found event imx8_ddr.read_cycles
>> adding {imx8_ddr.read_cycles}:W,{imx8_ddr.read_cycles}:W
>> imx8_ddr.read_cycles -> imx8_ddr0/event=0x2a/
>> imx8_ddr.read_cycles -> imx8_ddr1/event=0x2a/
>> imx8_ddr.read_cycles -> imx8_ddr0/event=0x2a/
>> imx8_ddr.read_cycles -> imx8_ddr1/event=0x2a/
>> imx8_ddr.read_cycles: 22748 1000378750 1000378750
>> imx8_ddr.read_cycles: 24640 1000376625 100

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