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Message-ID: <CAL_JsqK3fpM_tUjHvAMbNzf_nry_iORLXaQBFC8xDK+mxhHDRQ@mail.gmail.com>
Date: Mon, 27 Apr 2020 09:13:06 -0500
From: Rob Herring <robh@...nel.org>
To: Wang Wenhu <wenhu.wang@...o.com>
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Arnd Bergmann <arnd@...db.de>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
linuxppc-dev <linuxppc-dev@...ts.ozlabs.org>, kernel@...o.com,
Christophe Leroy <christophe.leroy@....fr>,
Scott Wood <oss@...error.net>,
Michael Ellerman <mpe@...erman.id.au>,
Randy Dunlap <rdunlap@...radead.org>
Subject: Re: [PATCH v2,RESEND] misc: new driver sram_uapi for user level SRAM access
On Sun, Apr 19, 2020 at 10:06 PM Wang Wenhu <wenhu.wang@...o.com> wrote:
>
> A generic User-Kernel interface that allows a misc device created
> by it to support file-operations of ioctl and mmap to access SRAM
> memory from user level. Different kinds of SRAM alloction and free
> APIs could be registered by specific SRAM hardware level driver to
> the available list and then be chosen by users to allocate and map
> SRAM memory from user level.
>
> It is extremely helpful for the user space applications that require
> high performance memory accesses, such as embedded networking devices
> that would process data in user space, and PowerPC e500 is a case.
>
> Signed-off-by: Wang Wenhu <wenhu.wang@...o.com>
> Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
> Cc: Arnd Bergmann <arnd@...db.de>
> Cc: Christophe Leroy <christophe.leroy@....fr>
> Cc: Scott Wood <oss@...error.net>
> Cc: Michael Ellerman <mpe@...erman.id.au>
> Cc: Randy Dunlap <rdunlap@...radead.org>
> Cc: linuxppc-dev@...ts.ozlabs.org
> ---
> Changes since v1: addressed comments from Arnd
> * Changed the ioctl cmd definitions using _IO micros
> * Export interfaces for HW-SRAM drivers to register apis to available list
> * Modified allocation alignment to PAGE_SIZE
> * Use phys_addr_t as type of SRAM resource size and offset
> * Support compat_ioctl
> * Misc device name:sram
>
> Note: From this on, the SRAM_UAPI driver is independent to any hardware
> drivers, so I would only commit the patch itself as v2, while the v1 of
> it was wrapped together with patches for Freescale L2-Cache-SRAM device.
> Then after, I'd create patches for Freescale L2-Cache-SRAM device as
> another series.
There's work to add SRAM support to dma-buf heaps[1]. Take a look and
see if that works for you.
Rob
[1] https://lore.kernel.org/lkml/20200424222740.16259-1-afd@ti.com/
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