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Message-ID: <20200428085019.GB32592@dragon>
Date: Tue, 28 Apr 2020 16:50:20 +0800
From: Shawn Guo <shawnguo@...nel.org>
To: peng.fan@....com
Cc: s.hauer@...gutronix.de, robh+dt@...nel.org,
jaswinder.singh@...aro.org, linux@...pel-privat.de,
kernel@...gutronix.de, festevam@...il.com, linux-imx@....com,
Anson.Huang@....com, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH 2/2] arm64: dts: imx8qxp: support scu mailbox channel
On Tue, Apr 14, 2020 at 09:24:28PM +0800, peng.fan@....com wrote:
> From: Peng Fan <peng.fan@....com>
>
> With mailbox driver support i.MX8 SCU MU channel, we could
> use it to avoid trigger interrupts for each TR/RR registers
> in one MU, instead, only one RX interrupt for a recv and
> one TX interrupt for a send.
>
> Signed-off-by: Peng Fan <peng.fan@....com>
Applied, thanks.
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