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Message-ID: <20200428100055.GB5677@sirena.org.uk>
Date:   Tue, 28 Apr 2020 11:00:55 +0100
From:   Mark Brown <broonie@...nel.org>
To:     Dilip Kota <eswara.kota@...ux.intel.com>
Cc:     robh@...nel.org, linux-spi@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        daniel.schwierzeck@...il.com, hauke@...ke-m.de,
        andriy.shevchenko@...el.com, cheol.yong.kim@...el.com,
        chuanhua.lei@...ux.intel.com, qi-ming.wu@...el.com
Subject: Re: [PATCH 1/4] spi: lantiq: Synchronize interrupt handlers and
 transfers

On Tue, Apr 28, 2020 at 01:39:06PM +0800, Dilip Kota wrote:

> Do you suggest to use different ISRs for multiple interrupt lines and single
> ISR for single interrupt line? I see, this results in writing repetitive
> code lines.

It looks like the shared case is mainly a handler that calls the two
other handlers?

> Does single ISR looks erroneous! Please let me know.

The change was not entirely clear, I was having trouble convincing
myself that all the transformations were OK partly because I kept on
finding little extra changes in there and partly because there were
several things going on.  In theory it could work.

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