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Message-ID: <CAE=gft5REvz+0JLHtEN1BXmvWzMxftdecxPedLizgS47x1Sq7w@mail.gmail.com>
Date:   Wed, 29 Apr 2020 10:27:39 -0700
From:   Evan Green <evgreen@...omium.org>
To:     Sibi Sankar <sibis@...eaurora.org>
Cc:     Bjorn Andersson <bjorn.andersson@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Andy Gross <agross@...nel.org>,
        linux-arm-msm <linux-arm-msm@...r.kernel.org>,
        linux-remoteproc@...r.kernel.org,
        LKML <linux-kernel@...r.kernel.org>,
        Ohad Ben Cohen <ohad@...ery.com>
Subject: Re: [PATCH 0/2] Drop all accesses to MPSS PERPH register space

On Wed, Apr 15, 2020 at 7:51 AM Sibi Sankar <sibis@...eaurora.org> wrote:
>
> 7C retail devices using MSA based boot will result in a fuse combination
> which will prevent accesses to MSS PERPH register space where the mpss
> clocks and halt-nav reside. Hence requesting a halt-nav as part of the
> SSR sequence will result in a NoC error. Issuing HALT NAV request and
> turning on the mss clocks as part of SSR will no longer be required
> since the modem firmware will have the necessary fixes to ensure that
> there are no pending NAV DMA transactions thereby ensuring a smooth
> SSR.
>
> Sibi Sankar (2):
>   dt-bindings: remoteproc: qcom: Replace halt-nav with spare-regs
>   remoteproc: qcom_q6v5_mss: Drop accesses to MPSS PERPH register space

I haven't tested things in the "production" fuse configuration yet,
but in my current configuration I've got a tree that's running the
modem well.

Tested-by: Evan Green <evgreen@...omium.org>

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