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Date:   Wed, 29 Apr 2020 20:11:49 +0200
From:   Borislav Petkov <bp@...en8.de>
To:     Reinette Chatre <reinette.chatre@...el.com>
Cc:     tglx@...utronix.de, fenghua.yu@...el.com, tony.luck@...el.com,
        kuo-lang.tseng@...el.com, mingo@...hat.com, babu.moger@....com,
        hpa@...or.com, x86@...nel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] x86/resctrl: Support CPUID enumeration of MBM
 counter width

On Wed, Apr 01, 2020 at 10:51:02AM -0700, Reinette Chatre wrote:
> diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
> index 4cdb123ff66a..8552d2fadc15 100644
> --- a/arch/x86/kernel/cpu/common.c
> +++ b/arch/x86/kernel/cpu/common.c
> @@ -856,6 +856,8 @@ static void init_speculation_control(struct cpuinfo_x86 *c)
>  
>  static void init_cqm(struct cpuinfo_x86 *c)
>  {
> +	c->x86_cache_mbm_width_offset = -1;
> +
>  	if (!cpu_has(c, X86_FEATURE_CQM_LLC)) {
>  		c->x86_cache_max_rmid  = -1;
>  		c->x86_cache_occ_scale = -1;
> @@ -875,6 +877,9 @@ static void init_cqm(struct cpuinfo_x86 *c)
>  
>  		c->x86_cache_max_rmid  = ecx;
>  		c->x86_cache_occ_scale = ebx;
> +		/* EAX contents is only defined for Intel CPUs */
> +		if (c->x86_vendor == X86_VENDOR_INTEL)
> +			c->x86_cache_mbm_width_offset = eax & 0xff;

Remind me again pls why is all this RDT stuff replicated per CPU instead
of it being properly detected somewhere down in resctrl_late_init()?

Looking at get_rdt_resources(), it kinda wants to have that in there
too?

IOW, how about moving all that gunk in init_cqm() to resctrl/ where it
truly belongs? Doesn't have to be this patchset but this patchset can
start moving it...

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

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