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Date: Wed, 29 Apr 2020 23:46:10 +0300 From: Priit Laes <plaes@...es.org> To: Maxime Ripard <mripard@...nel.org>, Chen-Yu Tsai <wens@...e.org>, Rob Herring <robh+dt@...nel.org>, linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org, linux-sunxi@...glegroups.com Cc: Priit Laes <plaes@...es.org> Subject: [PATCH v2 4/6] dt-bindings: net: sun7i-gmac: Add syscon support Now that driver supports syscon-based regmap access, document also the devicetree binding. Signed-off-by: Priit Laes <plaes@...es.org> --- .../bindings/net/allwinner,sun7i-a20-gmac.yaml | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml index 703d0d886884..c41d7c598c19 100644 --- a/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml +++ b/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml @@ -29,17 +29,26 @@ properties: clocks: items: - description: GMAC main clock + + # Deprecated - description: TX clock clock-names: items: - const: stmmaceth + + # Deprecated - const: allwinner_gmac_tx phy-supply: description: PHY regulator + syscon: + $ref: /schemas/types.yaml#definitions/phandle + description: + Phandle to the device containing the GMAC clock register + required: - compatible - reg @@ -48,6 +57,7 @@ required: - clocks - clock-names - phy-mode + - syscon unevaluatedProperties: false @@ -55,11 +65,12 @@ examples: - | gmac: ethernet@...0000 { compatible = "allwinner,sun7i-a20-gmac"; + syscon = <&syscon>; reg = <0x01c50000 0x10000>; interrupts = <0 85 1>; interrupt-names = "macirq"; - clocks = <&ahb_gates 49>, <&gmac_tx>; - clock-names = "stmmaceth", "allwinner_gmac_tx"; + clocks = <&ahb_gates 49>; + clock-names = "stmmaceth"; phy-mode = "mii"; }; -- 2.26.2
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