lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:   Wed, 29 Apr 2020 10:02:20 +0200
From:   Alexandre Torgue <alexandre.torgue@...com>
To:     <mani@...nel.org>, <robh+dt@...nel.org>,
        <mcoquelin.stm32@...il.com>
CC:     <devicetree@...r.kernel.org>,
        <linux-stm32@...md-mailman.stormreply.com>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 6/6] ARM: dts: stm32mp1: Add IoT Box board support

Hi Mani

On 4/20/20 7:31 PM, mani@...nel.org wrote:
> From: Manivannan Sadhasivam <mani@...nel.org>
> 
> IoT Box is an IoT gateway device based on Stinger96 board powered by
> STM32MP1 SoC, designed and manufactured by Shiratech Solutions. This
> device makes use of Stinger96 board by having it as a base board with
> one additional mezzanine on top.
> 
> Following are the features exposed by this device in addition to the
> Stinger96 board:
> 
> * WiFi/BT
> * CCS811 VOC sensor
> * 2x Digital microphones IM69D130
> * 12x WS2812B LEDs
> 
> Following peripherals are tested and known to work:
> 
> * WiFi/BT
> * CCS811
> 
> More information about this device can be found in Shiratech website:
> https://www.shiratech-solutions.com/products/iot-box/
> 
> Signed-off-by: Manivannan Sadhasivam <mani@...nel.org>
> ---
>   arch/arm/boot/dts/Makefile                |  1 +
>   arch/arm/boot/dts/stm32mp157a-iot-box.dts | 92 +++++++++++++++++++++++
>   2 files changed, 93 insertions(+)
>   create mode 100644 arch/arm/boot/dts/stm32mp157a-iot-box.dts
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 966b81dfffd6..455ec6eb6303 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1030,6 +1030,7 @@ dtb-$(CONFIG_ARCH_STM32) += \
>   	stm32h743i-disco.dtb \
>   	stm32mp157a-avenger96.dtb \
>   	stm32mp157a-dk1.dtb \
> +	stm32mp157a-iot-box.dtb \
>   	stm32mp157a-stinger96.dtb \
>   	stm32mp157c-dhcom-pdk2.dtb \
>   	stm32mp157c-dk2.dtb \
> diff --git a/arch/arm/boot/dts/stm32mp157a-iot-box.dts b/arch/arm/boot/dts/stm32mp157a-iot-box.dts
> new file mode 100644
> index 000000000000..fa1c006ce531
> --- /dev/null
> +++ b/arch/arm/boot/dts/stm32mp157a-iot-box.dts
> @@ -0,0 +1,92 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (C) 2020 Manivannan Sadhasivam
> + */
> +
> +/dts-v1/;
> +#include "stm32mp157a-stinger96.dtsi"
> +
> +/ {
> +	model = "Shiratech STM32MP157A IoT Box";
> +	compatible = "shiratech,stm32mp157a-iot-box", "st,stm32mp157";
> +
> +	wlan_pwr: regulator-wlan {
> +		compatible = "regulator-fixed";
> +
> +		regulator-name = "wl-reg";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +
> +		gpios = <&gpiog 3 GPIO_ACTIVE_HIGH>;
> +		enable-active-high;
> +	};
> +};
> +
> +&i2c2 {
> +	ccs811@5b {
> +		compatible = "ams,ccs811";
> +		reg = <0x5b>;
> +		wakeup-gpios = <&gpioa 12 GPIO_ACTIVE_LOW>;
> +		reset-gpios = <&gpioa 11 GPIO_ACTIVE_LOW>;
> +	};
> +};
> +
> +&pinctrl {

Currently all pinmux definition are done in stm32mp15-pinctrl.dtsi file.
Can you move it ?

Otherwise (except commit title) it is ok for me.

thanks
alex

> +	/*
> +	 * Note: The SDMMC2 pins lack external pullups on data lines. Hence,
> +	 * we need to enable it in the SoC.
> +	 */
> +	sdmmc2_b4_pins_pull: sdmmc2-b4-pull {
> +		pins1 {
> +			pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
> +				 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
> +				 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
> +				 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
> +				 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
> +			slew-rate = <1>;
> +			bias-pull-up;
> +		};
> +		pins2 {
> +			pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
> +			slew-rate = <2>;
> +			drive-push-pull;
> +			bias-disable;
> +		};
> +	};
> +};
> +
> +/* WiFi */
> +&sdmmc2 {
> +	pinctrl-names = "default", "opendrain", "sleep";
> +	pinctrl-0 = <&sdmmc2_b4_pins_pull>;
> +	pinctrl-1 = <&sdmmc2_b4_od_pins_b>;
> +	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>;
> +	broken-cd;
> +	non-removable;
> +	st,neg-edge;
> +	bus-width = <1>;
> +	vmmc-supply = <&wlan_pwr>;
> +	status = "okay";
> +
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +	brcmf: bcrmf@1 {
> +		reg = <1>;
> +		compatible = "brcm,bcm4329-fmac";
> +	};
> +};
> +
> +/* Bluetooth */
> +&uart4 {
> +	/* Note: HW flow control is broken, hence using custom CTS/RTS gpios */
> +	/delete-property/st,hw-flow-ctrl;
> +	cts-gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
> +	rts-gpios = <&gpiob 0 GPIO_ACTIVE_LOW>;
> +	status = "okay";
> +
> +	bluetooth {
> +		shutdown-gpios = <&gpiog 2 GPIO_ACTIVE_HIGH>;
> +		compatible = "brcm,bcm43438-bt";
> +		max-speed = <115200>;
> +	};
> +};
> 

Powered by blists - more mailing lists