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Message-ID: <DM6PR11MB3721F4B7281CDD101E37A9ABDDAD0@DM6PR11MB3721.namprd11.prod.outlook.com>
Date: Wed, 29 Apr 2020 00:58:14 +0000
From: "Wan Mohamad, Wan Ahmad Zainie"
<wan.ahmad.zainie.wan.mohamad@...el.com>
To: Rob Herring <robh@...nel.org>
CC: "kishon@...com" <kishon@...com>,
"mark.rutland@....com" <mark.rutland@....com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: RE: [PATCH 1/2] dt-bindings: phy: intel: Add documentation for Keem
Bay eMMC PHY
> -----Original Message-----
> From: Rob Herring <robh@...nel.org>
> Sent: Tuesday, March 31, 2020 4:23 AM
> To: Wan Mohamad, Wan Ahmad Zainie
> <wan.ahmad.zainie.wan.mohamad@...el.com>
> Cc: kishon@...com; mark.rutland@....com; linux-kernel@...r.kernel.org;
> devicetree@...r.kernel.org
> Subject: Re: [PATCH 1/2] dt-bindings: phy: intel: Add documentation for
> Keem Bay eMMC PHY
>
> On Mon, Mar 16, 2020 at 06:37:25PM +0800, Wan Ahmad Zainie wrote:
> > Document Intel Keem Bay eMMC PHY DT bindings.
> >
> > Signed-off-by: Wan Ahmad Zainie
> <wan.ahmad.zainie.wan.mohamad@...el.com>
> > ---
> > .../bindings/phy/intel,keembay-emmc-phy.yaml | 57
> +++++++++++++++++++
> > 1 file changed, 57 insertions(+)
> > create mode 100644
> Documentation/devicetree/bindings/phy/intel,keembay-emmc-phy.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/phy/intel,keembay-
> emmc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,keembay-
> emmc-phy.yaml
> > new file mode 100644
> > index 000000000000..af1d62fc8323
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/intel,keembay-emmc-
> phy.yaml
> > @@ -0,0 +1,57 @@
> > +# SPDX-License-Identifier: GPL-2.0-only
>
> Dual license new bindings:
>
> (GPL-2.0-only OR BSD-2-Clause)
Will change in v2.
>
> > +# Copyright 2020 Intel Corporation
> > +%YAML 1.2
> > +---
> > +$id: "http://devicetree.org/schemas/phy/intel,keembay-emmc-
> phy.yaml#"
> > +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> > +
> > +title: Intel Keem Bay eMMC PHY
> > +
> > +maintainers:
> > + - Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@...el.com>
> > +
> > +properties:
> > + compatible:
> > + enum:
> > + - intel,keembay-emmc-phy
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + clocks:
> > + maxItems: 1
> > +
> > + clock-names:
> > + items:
> > + - const: emmcclk
> > +
> > + intel,syscon:
> > + $ref: '/schemas/types.yaml#/definitions/phandle'
>
> Make this binding a child of the syscon and get rid of this.
>
> > + description:
> > + A phandle to a syscon device used to access core/phy configuration
> > + registers.
> > +
> > + "#phy-cells":
> > + const: 0
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - intel,syscon
> > + - "#phy-cells"
> > +
> > +examples:
> > + - |
> > + mmc_phy_syscon: syscon@...90000 {
> > + compatible = "simple-mfd", "syscon";
> > + reg = <0x0 0x20290000 0x0 0x54>;
> > + };
> > +
> > + emmc_phy: mmc_phy@...90000 {
>
> phy@...
Will change in v2.
>
> > + compatible = "intel,keembay-emmc-phy";
> > + reg = <0x0 0x20290000 0x0 0x54>;
>
> Here you have overlapping register regions. Don't do that.
>
> Given they are the same size, why do you need the syscon at all?
In v2, the driver will use regmap_mmio. With that, can remove
intel,syscon. I will send out once reviewed internally.
>
> > + clocks = <&mmc>;
> > + clock-names = "emmcclk";
> > + intel,syscon = <&mmc_phy_syscon>;
> > + #phy-cells = <0>;
> > + };
> > --
> > 2.17.1
> >
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