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Message-ID: <6b3ad9f3-2a3c-b44c-3c3f-24f2178dd3fa@linux.intel.com>
Date: Wed, 29 Apr 2020 22:26:25 +0800
From: "Ramuthevar, Vadivel MuruganX"
<vadivel.muruganx.ramuthevar@...ux.intel.com>
To: Boris Brezillon <boris.brezillon@...labora.com>
Cc: linux-kernel@...r.kernel.org, linux-mtd@...ts.infradead.org,
devicetree@...r.kernel.org, miquel.raynal@...tlin.com,
richard@....at, vigneshr@...com, arnd@...db.de,
brendanhiggins@...gle.com, tglx@...utronix.de,
anders.roxell@...aro.org, masonccyang@...c.com.tw,
robh+dt@...nel.org, linux-mips@...r.kernel.org,
hauke.mehrtens@...el.com, andriy.shevchenko@...el.com,
qi-ming.wu@...el.com, cheol.yong.kim@...el.com
Subject: Re: [PATCH v4 2/2] mtd: rawnand: Add NAND controller support on Intel
LGM SoC
Hi Boris,
Thank you very much for the review comments and your time...
On 29/4/2020 9:32 pm, Boris Brezillon wrote:
> On Wed, 29 Apr 2020 21:29:40 +0800
> "Ramuthevar, Vadivel MuruganX"
> <vadivel.muruganx.ramuthevar@...ux.intel.com> wrote:
>
>> Hi Boris,
>>
>> Thank you very much for the review comments and your time..
>>
>> On 29/4/2020 7:33 pm, Boris Brezillon wrote:
>>> On Wed, 29 Apr 2020 18:42:05 +0800
>>> "Ramuthevar,Vadivel MuruganX"
>>> <vadivel.muruganx.ramuthevar@...ux.intel.com> wrote:
>>>
>>>> +#define NAND_WRITE_CMD (EBU_CON_CS_P_LOW | HSNAND_CLE_OFFS)
>>>> +#define NAND_WRITE_ADDR (EBU_CON_CS_P_LOW | HSNAND_ALE_OFFS)
>>>> +
>>>
>>> I thought we agreed on dropping those definitions.
>>
>> Yes , we agreed upon it, due to assertion/de-assertion of CS kept it.
>
> And I keep thinking we don't need that, just pass
> 'HSNAND_CLE_OFFS | HSNAND_CS_OFFS' directly.
Agreed!, will update in the next-patch version, Thanks!
Regards
Vadivel
>
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