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Message-ID: <f5961645-fe35-7ef5-05ff-c1529c5699a1@linux.intel.com>
Date: Wed, 29 Apr 2020 23:29:29 +0800
From: "Ramuthevar, Vadivel MuruganX"
<vadivel.muruganx.ramuthevar@...ux.intel.com>
To: Boris Brezillon <boris.brezillon@...labora.com>,
qi-ming.wu@...el.com
Cc: linux-kernel@...r.kernel.org, linux-mtd@...ts.infradead.org,
devicetree@...r.kernel.org, cheol.yong.kim@...el.com,
hauke.mehrtens@...el.com, anders.roxell@...aro.org,
vigneshr@...com, arnd@...db.de, richard@....at,
brendanhiggins@...gle.com, linux-mips@...r.kernel.org,
robh+dt@...nel.org, miquel.raynal@...tlin.com, tglx@...utronix.de,
masonccyang@...c.com.tw, andriy.shevchenko@...el.com
Subject: Re: [PATCH v4 2/2] mtd: rawnand: Add NAND controller support on Intel
LGM SoC
Hi Boris,
On 29/4/2020 11:18 pm, Ramuthevar, Vadivel MuruganX wrote:
> + writel(lower_32_bits(ebu_host->cs[ebu_host->cs_num].nand_pa) |
> + EBU_ADDR_SEL_REGEN | EBU_ADDR_MASK,
> + ebu_host->ebu + EBU_ADDR_SEL(reg));
> +
> + writel(EBU_MEM_BASE_CS_0 | EBU_ADDR_MASK | EBU_ADDR_SEL_REGEN,
> + ebu_host->ebu + EBU_ADDR_SEL(0));
Good catch!, one will be removed , Thanks !
Regards
Vadivel
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