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Message-ID: <0938999b-00c0-25cf-9a87-a7abc1cbac1c@intel.com>
Date: Thu, 30 Apr 2020 08:36:42 +0300
From: Adrian Hunter <adrian.hunter@...el.com>
To: Andi Kleen <ak@...ux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@...nel.org>,
Jiri Olsa <jolsa@...hat.com>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 8/9] perf intel-pt: Update documentation about itrace G
and L options
On 30/04/20 2:03 am, Andi Kleen wrote:
>> +One caveat with the G and L options is that they work poorly with "Large PEBS".
>> +Large PEBS means PEBS records will be accumulated by hardware and the written
>> +into the event buffer in one go. That reduces interrupts, but can give very
>> +late timestamps. Because the Intel PT trace is synchronized by timestamps,
>
> Are you refering to Broadwell here?
I was testing on Coffee Lake
>
> On Skylake/Goldmont the PEBS event contains the TSC and the time stamp reported by
> perf should report the time the event was sampled based on that TSC.
> Or is that not working for some reason?
I guess it is not working like that, but perf tools would probably need
special rules to sort the events because the they would break the rules of
PERF_RECORD_FINISHED_ROUND, wouldn't they?
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