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Message-Id: <20200430063054.18879-1-manivannan.sadhasivam@linaro.org>
Date: Thu, 30 Apr 2020 12:00:53 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To: agross@...nel.org, bjorn.andersson@...aro.org, robh+dt@...nel.org
Cc: jassisinghbrar@...il.com, linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Subject: [PATCH 1/2] dt-bindings: soc: qcom: Add devicetree binding for Qcom IPCC
Add devicetree YAML binding for Qualcomm Inter-Processor Communication
Controller (IPCC) block.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
---
.../bindings/soc/qcom/qcom,ipcc.yaml | 85 +++++++++++++++++++
include/dt-bindings/soc/qcom,ipcc.h | 38 +++++++++
2 files changed, 123 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,ipcc.yaml
create mode 100644 include/dt-bindings/soc/qcom,ipcc.h
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,ipcc.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,ipcc.yaml
new file mode 100644
index 000000000000..48b281181401
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,ipcc.yaml
@@ -0,0 +1,85 @@
+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/qcom/qcom,ipcc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Technologies, Inc. Inter-Processor Communication Controller
+
+maintainers:
+ - Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
+
+description:
+ The Inter-Processor Communication Controller (IPCC) is a centralized hardware
+ to route the interrupts across various subsystems. It involves a three-level
+ addressing scheme called protocol, client and signal. For example, consider an
+ entity on the Application Processor Subsystem (APSS) that wants to listen to
+ Modem's interrupts via Shared Memory Point to Point (SMP2P) interface. In such
+ a case, the client would be Modem (client-id is 2) and the signal would be
+ SMP2P (signal-id is 2). The SMP2P itself falls under the Multiprocessor (MPROC)
+ protocol (protocol-id is 0). Refer include/dt-bindings/soc/qcom/qcom,ipcc.h
+ for the list of such IDs.
+
+ One of the duties of this interrupt controller driver is to forward the
+ interrupts to the correct entities on the APSS. The children inheriting the
+ interrupt-controller would be mentioning the client-id and signal-id it's
+ interested in.
+
+ On the other hand, sending an interrupt to a subsystem is done through the
+ mailbox interface, which again requires client-id and signal-id.
+
+properties:
+ compatible:
+ const: "qcom,ipcc"
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-controller: true
+
+ "#interrupt-cells":
+ const: 3
+ description:
+ The first cell is the client-id, the second cell is the signal-id and the
+ third cell is the interrupt type.
+
+ "#mbox-cells":
+ const: 2
+ description:
+ The first cell is the client-id, and the second cell is the signal-id.
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-controller
+ - "#interrupt-cells"
+ - "#mbox-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/soc/qcom,ipcc.h>
+
+ ipcc_mproc: qcom,ipcc@...000 {
+ compatible = "qcom,ipcc";
+ reg = <0x408000 0x1000>;
+ interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ #mbox-cells = <2>;
+ };
+
+ smp2p-modem {
+ compatible = "qcom,smp2p";
+ interrupts-extended = <&ipcc_mproc IPCC_CLIENT_MPSS
+ IPCC_MPROC_SIGNAL_SMP2P IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc_mproc IPCC_CLIENT_MPSS IPCC_MPROC_SIGNAL_SMP2P>;
+
+ /* Other SMP2P fields */
+ };
diff --git a/include/dt-bindings/soc/qcom,ipcc.h b/include/dt-bindings/soc/qcom,ipcc.h
new file mode 100644
index 000000000000..2926cdb4cb48
--- /dev/null
+++ b/include/dt-bindings/soc/qcom,ipcc.h
@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
+ */
+
+#ifndef __DT_BINDINGS_QCOM_IPCC_H
+#define __DT_BINDINGS_QCOM_IPCC_H
+
+/* Signal IDs for MPROC protocol */
+#define IPCC_MPROC_SIGNAL_GLINK_QMP 0
+#define IPCC_MPROC_SIGNAL_SMP2P 2
+#define IPCC_MPROC_SIGNAL_PING 3
+#define IPCC_MPROC_SIGNAL_MAX 4 /* Used by driver only */
+
+#define IPCC_COMPUTE_L0_SIGNAL_MAX 32 /* Used by driver only */
+#define IPCC_COMPUTE_L1_SIGNAL_MAX 32 /* Used by driver only */
+
+/* Client IDs */
+#define IPCC_CLIENT_AOP 0
+#define IPCC_CLIENT_TZ 1
+#define IPCC_CLIENT_MPSS 2
+#define IPCC_CLIENT_LPASS 3
+#define IPCC_CLIENT_SLPI 4
+#define IPCC_CLIENT_SDC 5
+#define IPCC_CLIENT_CDSP 6
+#define IPCC_CLIENT_NPU 7
+#define IPCC_CLIENT_APSS 8
+#define IPCC_CLIENT_GPU 9
+#define IPCC_CLIENT_CVP 10
+#define IPCC_CLIENT_CAM 11
+#define IPCC_CLIENT_VPU 12
+#define IPCC_CLIENT_PCIE0 13
+#define IPCC_CLIENT_PCIE1 14
+#define IPCC_CLIENT_PCIE2 15
+#define IPCC_CLIENT_SPSS 16
+#define IPCC_CLIENT_MAX 17 /* Used by driver only */
+
+#endif
--
2.17.1
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