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Message-ID: <44a5cb0d-f9bc-5322-0333-bb39d43f6613@codeaurora.org>
Date:   Mon, 4 May 2020 11:43:11 +0530
From:   Sivaprakash Murugesan <sivaprak@...eaurora.org>
To:     Rob Herring <robh@...nel.org>
Cc:     agross@...nel.org, bjorn.andersson@...aro.org,
        mturquette@...libre.com, sboyd@...nel.org,
        jassisinghbrar@...il.com, linux-arm-msm@...r.kernel.org,
        linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH V3 2/8] dt-bindings: clock: Add YAML schemas for QCOM A53
 PLL

Hi Rob,

On 4/21/2020 2:31 AM, Rob Herring wrote:
> On Tue, Apr 14, 2020 at 08:25:16AM +0530, Sivaprakash Murugesan wrote:
>> This patch adds schema for primary CPU PLL found on few Qualcomm
>> platforms.
>>
>> Signed-off-by: Sivaprakash Murugesan <sivaprak@...eaurora.org>
>> ---
>> [V3]
>>   * Fixed dt binding error in "$id" field.
>>
>>   .../devicetree/bindings/clock/qcom,a53pll.txt      | 22 --------
>>   .../devicetree/bindings/clock/qcom,a53pll.yaml     | 60 ++++++++++++++++++++++
>>   2 files changed, 60 insertions(+), 22 deletions(-)
>>   delete mode 100644 Documentation/devicetree/bindings/clock/qcom,a53pll.txt
>>   create mode 100644 Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/clock/qcom,a53pll.txt b/Documentation/devicetree/bindings/clock/qcom,a53pll.txt
>> deleted file mode 100644
>> index e3fa811..0000000
>> --- a/Documentation/devicetree/bindings/clock/qcom,a53pll.txt
>> +++ /dev/null
>> @@ -1,22 +0,0 @@
>> -Qualcomm MSM8916 A53 PLL Binding
>> ---------------------------------
>> -The A53 PLL on MSM8916 platforms is the main CPU PLL used used for frequencies
>> -above 1GHz.
>> -
>> -Required properties :
>> -- compatible : Shall contain only one of the following:
>> -
>> -		"qcom,msm8916-a53pll"
>> -
>> -- reg : shall contain base register location and length
>> -
>> -- #clock-cells : must be set to <0>
>> -
>> -Example:
>> -
>> -	a53pll: clock@...6000 {
>> -		compatible = "qcom,msm8916-a53pll";
>> -		reg = <0xb016000 0x40>;
>> -		#clock-cells = <0>;
>> -	};
>> -
>> diff --git a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
>> new file mode 100644
>> index 0000000..c865293
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
>> @@ -0,0 +1,60 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/clock/qcom,a53pll.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Qualcomm A53 PLL Binding
>> +
>> +maintainers:
>> +  - Sivaprakash Murugesan <sivaprak@...eaurora.org>
>> +
>> +description:
>> +  The A53 PLL on few Qualcomm platforms is the main CPU PLL used used for
>> +  frequencies above 1GHz.
>> +
>> +properties:
>> +  compatible:
>> +    enum:
>> +      - qcom,msm8916-a53pll
>> +      - qcom,ipq6018-a53pll
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  '#clock-cells':
>> +    const: 0
>> +
>> +  clocks:
>> +    description: clocks required for this controller.
> That's every 'clocks'. Drop.
ok.
>
>> +    maxItems: 1
>> +
>> +  clock-names:
>> +    description: clock output names of required clocks.
> Drop. 'clock-names' are the input names.
ok.
>
>> +    maxItems: 1
> Need to define what the names are.

ok.

>

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