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Message-ID: <CAMuHMdXruqw2pb3pfXNfxNgtc24FmVA376DLBQgubEYSGO7LSA@mail.gmail.com>
Date: Mon, 4 May 2020 12:20:33 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Cc: Magnus Damm <magnus.damm@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Vinod Koul <vkoul@...nel.org>,
Ulf Hansson <ulf.hansson@...aro.org>,
Linus Walleij <linus.walleij@...aro.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
dmaengine <dmaengine@...r.kernel.org>,
Linux MMC List <linux-mmc@...r.kernel.org>,
"open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
"open list:SERIAL DRIVERS" <linux-serial@...r.kernel.org>,
Prabhakar <prabhakar.csengg@...il.com>
Subject: Re: [PATCH v2 02/10] pinctrl: sh-pfc: r8a7790: Add r8a7742 PFC support
Hi Prabhakar,
Thanks for the update!
On Sun, May 3, 2020 at 11:47 PM Lad Prabhakar
<prabhakar.mahadev-lad.rj@...renesas.com> wrote:
> Renesas RZ/G1H (R8A7742) is pin compatible with R-Car H2 (R8A7790),
> however it doesn't have several automotive specific peripherals. Add
> a r8a7790 specific pin groups/functions along with common pin
s/a r8a7790/automotive/?
> groups/functions for supporting both r8a7790 and r8a7742 SoC.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...renesas.com>
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
> @@ -5736,6 +5750,7 @@ static const struct sh_pfc_soc_operations r8a7790_pinmux_ops = {
> .pin_to_pocctrl = r8a7790_pin_to_pocctrl,
> };
>
> +#ifdef CONFIG_PINCTRL_PFC_R8A7790
> const struct sh_pfc_soc_info r8a7790_pinmux_info = {
> .name = "r8a77900_pfc",
> .ops = &r8a7790_pinmux_ops,
> @@ -5745,13 +5760,38 @@ const struct sh_pfc_soc_info r8a7790_pinmux_info = {
>
> .pins = pinmux_pins,
> .nr_pins = ARRAY_SIZE(pinmux_pins),
> - .groups = pinmux_groups,
> - .nr_groups = ARRAY_SIZE(pinmux_groups),
> - .functions = pinmux_functions,
> - .nr_functions = ARRAY_SIZE(pinmux_functions),
> + .groups = pinmux_groups.common,
> + .nr_groups = ARRAY_SIZE(pinmux_groups.common) +
> + ARRAY_SIZE(pinmux_groups.automotive),
> + .functions = pinmux_functions.common,
> + .nr_functions = ARRAY_SIZE(pinmux_functions.common) +
> + ARRAY_SIZE(pinmux_functions.automotive),
> +
> + .cfg_regs = pinmux_config_regs,
> +
> + .pinmux_data = pinmux_data,
> + .pinmux_data_size = ARRAY_SIZE(pinmux_data),
> +};
> +#endif
> +
> +#ifdef CONFIG_PINCTRL_PFC_R8A7742
> +const struct sh_pfc_soc_info r8a7742_pinmux_info = {
> + .name = "r8a77420_pfc",
> + .ops = &r8a7790_pinmux_ops,
> + .unlock_reg = 0xe6060000, /* PMMR */
> +
> + .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
> +
> + .pins = pinmux_pins,
> + .nr_pins = ARRAY_SIZE(pinmux_pins),
> + .groups = pinmux_groups.common,
> + .nr_groups = ARRAY_SIZE(pinmux_groups.common),
> + .functions = pinmux_functions.common,
> + .nr_functions = ARRAY_SIZE(pinmux_functions.common),
>
> .cfg_regs = pinmux_config_regs,
>
> .pinmux_data = pinmux_data,
> .pinmux_data_size = ARRAY_SIZE(pinmux_data),
> };
> +#endif
The r8a7742 section should be inserted before the r8a7790 section,
to preserve sort order.
No need to resend, will fix up while applying.
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
i.e. will queue in sh-pfc-for-v5.8.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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