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Message-ID: <834b9295-d46a-dd01-2496-2c24a8e7a8e4@nvidia.com>
Date:   Mon, 4 May 2020 07:36:05 -0700
From:   Sowjanya Komatineni <skomatineni@...dia.com>
To:     Dmitry Osipenko <digetx@...il.com>, <thierry.reding@...il.com>,
        <jonathanh@...dia.com>, <frankc@...dia.com>, <hverkuil@...all.nl>,
        <sakari.ailus@....fi>, <helen.koike@...labora.com>
CC:     <sboyd@...nel.org>, <linux-media@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-clk@...r.kernel.org>,
        <linux-tegra@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [RFC PATCH v11 6/9] media: tegra: Add Tegra210 Video input driver


On 5/4/20 12:44 AM, Dmitry Osipenko wrote:
> 30.04.2020 01:00, Sowjanya Komatineni пишет:
>> +/*
>> + * VI channel input data type enum.
>> + * These data type enum value gets programmed into corresponding Tegra VI
>> + * channel register bits.
>> + */
>> +enum tegra_image_dt {
>> +	TEGRA_IMAGE_DT_YUV420_8 = 24,
>> +	TEGRA_IMAGE_DT_YUV420_10,
>> +
>> +	TEGRA_IMAGE_DT_YUV420CSPS_8 = 28,
>> +	TEGRA_IMAGE_DT_YUV420CSPS_10,
>> +	TEGRA_IMAGE_DT_YUV422_8,
>> +	TEGRA_IMAGE_DT_YUV422_10,
>> +	TEGRA_IMAGE_DT_RGB444,
>> +	TEGRA_IMAGE_DT_RGB555,
>> +	TEGRA_IMAGE_DT_RGB565,
>> +	TEGRA_IMAGE_DT_RGB666,
>> +	TEGRA_IMAGE_DT_RGB888,
>> +
>> +	TEGRA_IMAGE_DT_RAW6 = 40,
>> +	TEGRA_IMAGE_DT_RAW7,
>> +	TEGRA_IMAGE_DT_RAW8,
>> +	TEGRA_IMAGE_DT_RAW10,
>> +	TEGRA_IMAGE_DT_RAW12,
>> +	TEGRA_IMAGE_DT_RAW14,
>> +};
> Are these format IDs common to all Tegra SoCs or they unique to T210?
Common for all SoCs

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